1. BJT Transistor Modeling - I Electronic Circuits First Term Second Year (11CS Batch) 1

2. Model A model is the combination of circuit elements, properly chosen, that best approximates the actual behaviour of a semiconductor device under specific operating conditions. Small Signal BJT Model r e Model Hybrid Parameter Model 2

3. Small Signal AC Analysis 1.Set all dc sources to zero and replace them by a short-circuit equivalent circuit. 2.Replace all capacitors by a short circuit equivalent. 3.Remove all elements bypassed by the short circuit equivalents introduced by steps 1 and 2. 4.Redraw the network in a more convenient and logical form. 3

4. AC Analysis Consider the following BJT circuit 4

5. AC Analysis Step 1,2,3: Step 4: Transistor Small Signal ac Equivalent Circuit Transistor Small Signal ac Equivalent Circuit 5

6. The Important Parameters: Z i, Z 0, A v, A i Input Impedance (Z i ): Two-Port System Two-Port System IiIi ZiZi ViVi + - I0I0 Z0Z0 V0V0 + - 6

7. Input Impedance (Cont.) Two-Port System Two-Port System R Sense V S V i Z i I i + - 7

8. Example: For the system of the following Fig., determine the level of input impedance. Two-Port System Two-Port System R Sense V S V i = 1.2 mv Z i I i + - 2mv 1k  + - Solution: 8

9. Output Impedance (Z 0 ) The output impedance is determined at the output terminals looking back into the System with the applied signal set to zero. The output impedance of a BJT amplifier is resistive in nature and, depending on the configuration and placement of the resistive elements, Z 0 can vary from a few ohms to a level that can exceed 2 M . 9

10. Example: For the system of the following Figure, determine the level of output impedance. Solution: 10

11. Amplifier Gain Gain – A multiplier that exists between the input and output of a circuit. – For example, if the gain of an amplifier is 100, then the output signal is 100 times as great as the input signal under normal operating conditions. Types of Gain: – Voltage gain, A V – Current gain, A i – Power gain, A p 11

12. Voltage Gain The small signal ac voltage gain is defined as For the system of the above Fig., a load has not been connected to the output terminal, the gain is therefore referred to as no load voltage gain (A vNL ). For the transistor amplifiers, the no load gain is greater than the loaded voltage gain. 12

13. Using the Voltage Divider Rule A vNL V S V i Z i I i + - R s + - + - V 0 13

14. Example: For the BJT amplifier of the following Fig., determine V i, I i, Z i and A vs. Solution: BJT amplifier A vNL = 320 BJT amplifier A vNL = 320 V s = 40mv V i Z i + Rs Rs + - + - V 0 = 7.68v - 1.2k  14

15. Current Gain (A i ) BJT amplifier BJT amplifier RLRL V0V0 + - I0I0 ViVi ZiZi + - From the circuit and 15

16. Example: For the given BJT circuit, determine: (a) I i (b) Z i (c) V 0 (d) I 0 (e) A i. 16

17. The r e Transistor Model (a) Common Base (PNP) Configuration IeIe I c =  I e rere IeIe I c 17

18. Voltage Gain: fV 0 = -I 0 R L = -(-I c )R L V 0 =  I e R L and V i = I e Z i = I e r e Therefore, BJT Common-base Transistor amplifier BJT Common-base Transistor amplifier RLRL V0V0 + - ViVi ZiZi + - I c =  I e IeIe Z 0 =  I0I0 For the current gain 18

19. Example: For a common-base configuration with I E = 4mA,  = 0.98, and an ac signal of 2mV applied between the base and ammeter terminals: (a)Determine the input impedance (b)Calculate the voltage gain if a load of 0.56 k  is connected to the input terminals. (c)Find the output impedance and current gain. Solution: (a)Input Impedance = Z i = r e = 26  10 -3 /(4  10 -3 ) = 6.5  (b) (c) 19

20. The r e Transistor Model Common Emitter Configuration: I c =  I b IcIc IcIc I b (a) CE (NPN) Configuration (b) r e Model 20 IeIe

21. 21 I c =  I b I i = I b v be re re vi vi IeIe BJT Common- emitter Transistor amplifier BJT Common- emitter Transistor amplifier RLRL V0V0 + - ViVi ZiZi + - I 0 = I c =  I b I i =I b Z 0 = 

22. Example: Given  = 120 and I E = 3.2 mA for a common- emitter configuration with r 0 =  , determine: (a) Z i (b) A v if a load of 2 k  is applied. (c) A i with 2 k  load. Solution: (a) (b) A v = -R L /r e = -2000/8.125 = -246.15 (c) A i =  = 120 22

23. r e Model for the Common-Emitter Configuration 23 Note: r 0 may be computed from the BJT output characteristics.

24. Common Emitter Fixed Biased Configuration 24 (a) CE Fixed Bias Configuration (b) All capacitors and dc power supply removed (c) Circuit with the substitution of the r e model

25. From Fig. (c) of the previous slide, the input impedance may be computed as Z i = R B ||  r e ohms or 25 In the majority of situations, R B  10re. In such cases The output impedance is: Z 0 = r 0 ||R C or

26. 26 If r 0  10R C Voltage Gain: But or

27. 27 If r 0  10R C, then or Current Gain: But If r 0  10R C and R B  10  r e, then Also, note that

28. Example: For the given network (a)Determine r e. (b)Find Z i (with r 0 =   ). (c)Calculate Z 0 (with r =   ). (d) Determine A v (with r =   ). (e)Find A i (with r =   ). (f)Repeat parts (c) through (e) including r = 50 k  in all calculations and compare results. Solution: (a) 28

29. 29 (b) (c) (d) (e) (f)

30. Voltage Divider Bias 30

31. 31 Input Impedance: Output Impedance: If r 0  10R C Voltage Gain: But If r 0  10R C

32. 32 Current Gain: If r 0  10R C Where R’ = R 1 ||R 2 Also note that

33. Example: For the network shown in the Fig., determine: (a)r e (b) Z i (c) Z 0 (r 0 =  ) (d) A v (r 0 =  ) (e) A i (r 0 =  ) (f) The parameters of part (b) throughif r 0 = 50 k . Solution: (a) 33

34. 34 (b) (c) (d) (e) (f)

35. CE Emitter Bias Configuration 35 Fig. (a) Fig. (b) Applying KVL to the input Side of Fig (b) we get V i = I b  r e + I e R E or V i = I b  r e + (  + 1)I b R E and the impedance Z b is: or

36. 36 Since  >> 1, therefore  + 1  .  Z b   r e +  R E or Since R E is often much greater than r e, the above equation is further reduced to Returning to Fig. (b), we have The output impedance Z 0 is determined as:

37. CE Emitter Bias Configuration Voltage Gain: 37 and Substituting Z b =  (r e + R E ) and for the approximation Z b   R E

38. CE Emitter Bias Configuration Current Gain: 38 Since In addition, I 0 =  I b so that  or

39. Example: For the network of the given Fig., determine (using appropriate approximations): (a) r e (b) Z i (c) Z 0 (d) A v and (e) A i. Solution: (a)Testing  R E > 10R 2 (210)(0.68k  ) > 10(10k  ) 142.8k  > 100k  satisfied. 39

40. (b) The ac equivalent circuit is shown here. From this circuit The testing conditions r 0  10(R C +R E ) and r 0  10R C are both satisfied. Using the appropriate approximations yields Z b   R E = 142.8 k  Z i = R B ||Z b = 9k  ||142.8k  = 8.47k  (c) Z 0 = R C = 2.2k  (d) A v = -R C /R E = -3.24 (e) A i = -A v Z i /R L = 144.1 40

41. Emitter Follower Configuration 41 Emitter Follower Configuration r e Model for EF Configuration

42. Emitter Follower Configuration Input Impedance (Z i ): Z i = R B ||Z b With Z B =  r e + (  + 1)R E. or Z b   (r e + R E ) and Zb  RE.Zb  RE. 42

43. Emitter Follower Configuration Output Impedance (Z 0 ): 43 and Substituting for Z b gives or

44. Emitter Follower Configuration 44 but and so that If we now construct the network defined By the above equation: Since R E >> r e, so

45. Emitter Follower Configuration Voltage Gain (A V ): From the circuit given below We have 45 Since R E >> r e

46. Emitter Follower Configuration 46 From the Fig. or and or so that

47. Emitter Follower Circuit 47 and since (  + 1)  , or

48. Example: For the emitter follower network of the Fig., determine (a) r e (b) Z i (c) Z 0 (d) A V (e) A i. Solution: (a) 48 (b)Z b =  r e + (  + 1)R = 334.56 k  Z i = R B ||Z B = 132.72k 

49. 49 (c) Z 0 = R E ||r e = 12.56  (d) (e)

50. Collector Feedback Configuration 50

51. Collector Feedback Configuration 51 Input Impedance (Z i ): With V 0 = -I 0 R C and I 0 =  I b + I’ Since  I b is generally much larger than I’, I 0   I b and V 0 = -(  I b )(R C ) = -  I b R C But and

52. Collector Feedback Configuration 52 Therefore The result is

53. Collector Feedback Configuration 53 But R C is usually much greater than r e and 1 + R C /r e  R C /r e So that

54. Collector Feedback Configuration Output Impedance (Z 0 ): If we set V i to zero as required to define Z 0, the network will appear as shown below and Z 0 = R C ||R F 54

55. Collector Feedback Configuration 55 Voltage Gain (A V ): At node C: For typical values,  I b >> I’ and I 0   I b. V 0 = -I 0 R C = -(  I b )R C Substituting I b = V i /  r e gives us and

56. Collector Feedback Configuration Current Gain (A i ): Applying Kirchhoff’s law V i + V RF - V 0 = 0 and I b  r e + (I b – I i )R F + I 0 R C = 0 Using I 0   I b, we have I b  r e + I b R F – I i R F +  I b R C = 0 I b (  r e + R F +  R C ) = I i R F Substituting I b = I 0 /  from I 0 =  I b yields 56

57. Collector Feedback Configuration 57 and In general R F +  R C >>  r e For  R C >> R F, or

58. Example: For the given network, determine (a) r e (b) Z i (c) Z 0 (d) A V (e) A i. Solution: (a) (b) (c)Z 0 = R C ||R F = 2.66k  58 (d) A V = -R C /r e = -240.86 (e)