1. October 26, 2006 Parallel Image Processing Programming and Architecture IST PhD Lunch Seminar Wouter Caarls Quantitative Imaging Group

2. October 26, 20062 of 22 Why Parallel? Processing time Smaller timesteps, more scales, faster response times Memory Larger images, more dimensions Energy consumption More applications, smaller devices

3. October 26, 20063 of 22 Data parallelism Many image processing operations have locality of reference (segmentation, filtering, distance transforms, etc.)  Data parallelism

4. October 26, 20064 of 22 Task farm parallelism An application consists of many different operations Some of these operations are independent (scale spaces, parameter sweeps, noise realizations, etc.)  Task farm parallelism

5. October 26, 20065 of 22 Pipeline parallelism An image processing algorithm consists of consecutive stages If multiple objects are to be processed, they may be in different stages at the same time  Pipeline parallelism

6. October 26, 20066 of 22 Parallel hardware architectures Fine grained Irregular Superscalar (most modern microprocessors) VLIW (DSPs) Regular Vector (supercomputers, MMX) SIMD (graphics processors) Custom FPGA

7. October 26, 20067 of 22 Parallel hardware architectures Coarse grained Homogeneous Multi-core, SMP Cluster Heterogeneous Embedded systems Grid

8. October 26, 20068 of 22 Obstacles Programming Synchronization, bookkeeping Different systems, languages, optimization strategies Choosing an architecture Analyze program before it is written Additional requirements or unexpected performance may require rewrite

9. October 26, 20069 of 22 Architecture-independent parallel programming Data parallelism Differentiate between synchronization pattern and computation Library provides pattern, user provides computation Task farm & pipeline parallelism Operations do not work on images, but on streams Sequences of operation calls do not imply an order, but a stream graph.

10. October 26, 200610 of 22 Algorithmic Skeletons +=+=

11. October 26, 200611 of 22 Example skeletons Pixel Neighbourhood Recursive neighbourhood Stack Filter Associative reduction

12. October 26, 200612 of 22 Constructing stream graphs By program (dynamic) capture(orig); normalize(orig, norm); dx(orig, x_der, 1.0); dy(orig, y_der, 1.0); direction(x_der, y_der, dir); display(dir); Visually (static) normalize dxdy direction display capture

13. October 26, 200613 of 22 Mapping stream graphs to processors Processor 1Processor 2

14. October 26, 200614 of 22 Dealing with heterogeneous tasks Processor 1Processor 2 1 1 2 1 3 2 46 1 1 2 13 2 55

15. October 26, 200615 of 22 Dealing with interconnect Processor 1Processor 2Interconnect 1 1 2 13 2 4 4 558 1 1 2 13 2 4 347

16. October 26, 200616 of 22 Dealing with dependencies Processor 1Processor 2Interconnect 1 1 2 13 2 4 3(3)+4(3)+7 (3)+3 1 1 2 1 32 3+4(3)+4 4

17. October 26, 200617 of 22 Choosing an architecture automatically Architecture-independent program allows automatic analyis after it is written, but before an architecture is chosen Based on certain constraints, architecture can be chosen automatically to optimize some cost function. Tradeoff between cost, power and performance must be made by the designer

18. October 26, 200618 of 22 Design Space Exploration Program Archi- tecture MetricsAnalyze Explore

19. October 26, 200619 of 22 Search strategy Constrained single objective minimum performance cost

20. October 26, 200620 of 22 Search strategy Multiobjective tradeoff iteration performance cost

21. October 26, 200621 of 22 Search strategy Strength Pareto performance cost

22. October 26, 200622 of 22 Conclusions Architecture-independent programming allows Parallel programming without bookkeeping Targeting heterogeneous systems Choosing the most appropriate architecture automatically http://www.qi.tnw.tudelft.nl/~wcaarls/smartcam

23. October 26, 200623 of 22 Overview Parallelism in image processing Parallel hardware architectures Architecture-independent parallel programming Algorithmic skeletons Stream programming Choosing an appropriate architecture Design Space Exploration

24. October 26, 200624 of 22 Exploiting parallelism Fine grained, irregular Superscalar Dataflow dispatch & reorder Most modern microprocessors Automatic by processor Very Long Instruction Word Multiple instructions per word DSPs, Itanium “Automatic” by compiler Ex Dispatch I Ex I I III

25. October 26, 200625 of 22 Exploiting parallelism Fine grained, regular Vector instructions Supercomputers MMX/SSEx Special instructions/datatypes Single Instruction Multiple Data Graphics processors Special languages Ex Dispatch I Ex I I I MMMM

26. October 26, 200626 of 22 Exploiting parallelism Coarse grained Multiprocessing Multiple processors/cores sharing a memory Shared-memory threading libraries (pthread, OpenMP) Clusters Relatively loosely coupled systems connected by a network Message-passing libraries (MPI) Heterogeneous systems Exploit differences in algorithmic requirements Multiple paradigms in a single application