1. Applications of Synchronous Circuits (Class 10.2 – 3/28/2013) CSE 2441 – Introduction to Digital Logic Spring 2013 Instructor – Bill Carroll, Professor of CSE

2. Today’s Topics FSM application examples – Sequence recognizer – Code converter – Controller Synchronous circuit minimization – State reduction – State assignment

3. Sequence Recognizer for 01 in a Block Code of Block-Length Two

4. Test Your Understanding Design a realization of the block 01 recognizer. Use the following state assignment and JK flip flops. A: 00, B: 01, C: 10

5. Test Your Understanding – Self-Check PS x 01 AB/0C/0 BA/0A/1 CA/0 NS/z y1y2y1y2 x 01 0001/010/0 0100/000/1 1000/0 Y1Y2/zY1Y2/z y1y2y1y2 x 01 0000 0101 11dd 1000 z = xy 2 y1y2y1y2 x 01 0001 0100 11dd 10dd J1J1 y1y2y1y2 x 01 00dd 01dd 11dd 1011 K1K1 y1y2y1y2 x 01 0010 01dd 11dd 1000 J2J2 y1y2y1y2 x 01 00dd 0111 11dd 10dd K2K2 State Table Transition/Output TableOutput K-map Excitation K-maps J 1 = xy 2 ’K 1 = 1 or y 1 J 2 = x’y 1 ’K 2 = 1 or y 2

6. Test Your Understanding – Self-Check

7. Design a Recognizer for the Sequence 1111 Example 8.11 Figure 8.29 Note: This solution assumes non-block sequences and allows overlap. How would the solution change for block sequences and no overlap?

8. Code Converter Example Design a finite state machine to convert 3-bit binary code words to 3-bit Gray code words. BinaryGray 000000 001001 010011 011010 100110 101111 110101 111100 x: 000001010101111 Z: 000001011111100

9. Three-bit Binary to three-bit Gray State Diagram Assumes starting state A

10. Robot Controller -- Example 8.17 Figure 8.39 Finite-State Controller – A finite state machine that produces outputs that control the behavior of an electronic or electromechanical system based on controller inputs and state.

11. Robot Controller Specifications x = 1: robot in contact with an obstacle x = 0: robot not in contact with an obstacle z1 = 1: turn left z2 = 1: turn right Control algorithm: When an obstacle is encountered, turn right until cleared. Next time an obstacle is encountered, turn left until cleared. Continue alternating turns as obstacles are encountered. State A: No obstacle, last turn was left State B: Obstacle, turn right State C: No obstacle, last turn was right State D: Obstacle, turn left

12. Robot Controller Design Figure 8.40 (a) -- (e) z 1 = xy 1 z 2 = xy 1 ’

13. Robot Controller Excitation Equations y1y2y1y2 x 01 0000 0110 11dd 10dd y1y2y1y2 x 01 00dd 01dd 1100 1010 y1y2y1y2 x 01 0001 01dd 11dd 1000 y1y2y1y2 x 01 00dd 0100 1101 10dd J1J1 K1K1 J2J2 K2K2 J 1 = x’y 2 K 1 = x’y 2 ’J 2 = xy 1 ’K 2 = xy 1

14. Robot Controller Realization Figure 8.40 (f) z 1 = xy 1 z 2 = xy 1 ’ J 1 = x’y 2 K 1 = x’y 2 ’ J 2 = xy 1 ’K 2 = xy 1

15. Synchronous Circuit Minimization Eliminate redundant states – May reduce the number of flip flops needed – Usually reduces the number of combinational logic devices needed Make an optimal state assignment – usually reduces the number of combinational logic devices needed

16. Redundant States in Synchronous Circuits Removal of redundant states is important because – Cost: the number of memory elements is directly related to the number of states – Complexity: the more states the circuit contains, the more complex the design and implementation becomes – Aids failure analysis: diagnostic routines are often predicated on the assumption that no redundant states exist

17. Equivalent States States S 1, S 2, …, S j of a completely specified sequential circuit are said to be equivalent if and only if, for every possible input sequence, the same output sequence is produced by the circuit regardless of whether S 1, S 2, …, S j is the initial state. Let S i and S j be states of a completely specified sequential circuit. Let S k and S l be the next states of S i and S j, respectively for input I p. S i and S j are equivalent if and only if for every possible I p the following are conditions are satisfied. – The outputs produced by S i and S j are the same, – The next states S k and S l are equivalent.

18. Equivalent States Illustration Figure 9.1 Initial State Input Sequences 00011011 A 100100 B11100001 C11100001 D00011110 E00011110

19. Methods for Finding Equivalent States Inspection Partitioning Implication Tables

20. Finding Equivalent States By Inspection Figure 9.2

21. Equivalence Relations Equivalence relation: let R be a relation on a set S. R is an equivalence relation on S if and only if it is reflexive, symmetric, and transitive. An equivalence relation on a set partitions the set into disjoint equivalence classes. Example: let S = {A,B,C,D,E,F,G,H} and R = {(A,A),(B,B),(B,H),(C,C),(D,D),(D,E),(E,E),(E,D),(F,F),(G,G),(H,H), (H,B)}. Then P = (A)(BH)(C)(DE)(F)(G) Theorem: state equivalence in a sequential circuit is an equivalence relation on the set of states. Theorem: the equivalence classes defined by the state equivalence of a sequential circuit can be used as the states in an equivalent circuit.

22. Finding Equivalent States by Partitioning Overview – Successively refine partitions of states until two consecutive partitions are identical. States in the same block of the final partition are equivalent. Step 0 – P 0 : All states in one block. Step 1 – P 1 : Partitions are refined by outputs. Step 2 – P 2 to P k : Partitions are refined by next states. Step 3 – P k = P k+1 : Final blocks define equivalent states.

23. Partitioning Example x 01 AC/1B/0 BC/1E/0 CB/1E/0 DD/0B/1 EE/0A/1 Reconsider the sequential circuit from Figure 9.1 (b) P 0 = (ABCDE) P 1 = (ABC)(DE) P 2 = (A)(BC)(D)(E) P 3 = (A)(BC)(D)(E) Hence, B ≡ C.

24. Partitioning Example (concluded) Figure 9.3

25. Test Your Understanding x 01 AE/0D/0 BA/1F/0 CC/0A/1 DB/0A/0 ED/1C/0 F D/1 GH/1G/1 HC/1B/1 Find all equivalent states.

26. Test Your Understanding – Self Check Figure 9.4 P0 = (ABCDEFGH) P1 = (AD)(BE)(CF)(GH) P2 = (AD)(BE)(CF)(G)(H) P3 = (AD)(BE)(CF)(G)(H) A ≡ D: A’ B ≡ E: B’ C ≡ F: C’ G: D’ H: E’

27. Finding Equivalent States by Implication Tables Figure 9.7

28. Example 9.6 -- An implication table example