1. ERL Differential Current System Status Peter Cameron with contributions from Michelle Wilinski and Christophe DeFrance (Bergoz) 17 Sep 07

2. Outline 1.Damage threshold estimate 2.Test setup pictures, block diagram,… 3.DSA measurements a)Noise floor and DC drift b)Effect of temperature c)Conclusions from DSA measurements 4.FPGA measurements a)Block diagram b)measurement sensitivity 5.Discussion, conclusions,…

3. 1 uA-sec (6x10 12 electrons, or 1uC) used in the following slides

6. signal generator BergozElectronics BergozElectronics Agilent FFT box FPGA board Floppy ethernet Excel LabVIEW Test Setup Block Diagram scope

7. not 1/f !!! Full span (PCT nominal BW is 10KHz) noise spectrum

8. No averaging Comparison of single toroid and difference spectra single toroid difference of the two toroids

9. Bergoz – 5 averages (note log scale) Comparison with Bergoz measurement

10. Include spectral shaping in null? 400Hz BW noise spectra

11. Bergoz – 5 averages (note log scale)

12. Effect of temperature stabilization

13. Out of office What happened here??? B field change? 100uA/gauss gives.02 gauss.01667 uA-sec on 1 minute ~0.1 nA-sec drift over 160 minutes Time/temperature dependence of difference current

14. .0033 uA-sec Zoom on previous slide

15. Conclusions from DSA Measurements 1.Toroids meet Bergoz spec in uncontrolled conditions (temperature, magnetic field) of office test environment 2.Study and optimize proper thermal shielding 3.Frequent null calibration should not be needed 4.Slow loss limit should be in the range of 1nA-sec or better 5.Should be a useful diagnostic a)Machine protection b)(unprecedented and essential) Halo studies at ~10 -6 need moveable scrapers? 6.Need to understand vector averaging (more on this later)

16. Outline 1.Damage threshold estimate 2.Test setup pictures, block diagram,… 3.DSA measurements a)Noise floor and DC drift b)Effect of temperature c)Conclusions from DSA measurements 4.FPGA measurements a)Block diagram b)measurement sensitivity 5.Discussion, conclusions,…

17. BPM (also FCT, DCCT, BLM,…) Block Diagram

18. signal generator BergozElectronics BergozElectronics ML403 ethernet Lab VIEW Test Setup Block Diagram A to D FPGA wrapper Simulink Signal processing, feedback loop, MPS interface,… DIO DAC MPS null MPS function runs independent of Control System - robustness

19. BPM Module Embedded processor running vXworks/EPICS 9.38MHz RF reference x4 or x8 Laser pre- trigger Beam permit Process Variables (beam position,…) Process Variables (machine mode, beam mode,…) FPGA 1 sec event A/D PUE signals

20. FPGA board control panel

21. spectral content of simulated beam loss

22. Next slide is zoom on this

23. 0 1 2 3 4 5 6 7 8 9 10 Time [minutes] 1 uA-sec loss signal FPGA-based beam loss measurement (S/N ~same for DSA and FPGA) no loss signal

24. Comments, conclusions Consider toroid upgrades for RHIC –Present DCCTs are 5uA/rtHz? –Going to 0.1uA/rtHz would give much more sensitive diagnostic for machine tuning - this is important! Implementation of DI measurement on FPGA board was straightforward ~2 man-weeks of Joe Mead, 1 man-week of Pete Cameron Paradox? need to understand vector averaging,… see simulation Where from here? –Basic system functionality and spec demonstrated –I’m on travel for most of the coming month, then Run 8 –Priority shift to BPM electronics BPM system –Libera demo box due in any day now (after 3 months of trying to get it) –I’m at ITech (Slovenia) next week to work out details of Libera in ERL –Commercial vendor (the major supplier of demo boards) exploring design and fab of COTS FPGA board to our spec (~$1K vs ~$10K or more for Libera box, and much simpler) –Joe Mead is fabbing 4ch fast digitizer mezzanine for ML403 Hold off on further DI development until next spring?

25. Suggestions for upcoming meeting agendas Sep 17 th – presentation and discussion of DCCT and differential current status Sep 24 th – presentation and discussion of Profile status Oct 1 st – presentation and discussion of BPM status Oct 8 th – Scrapers and collimators