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L29:Lower Power Embedded Architecture Design 성균관대학교 조 준 동 교수, 1999. 8

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Presentation on theme: "L29:Lower Power Embedded Architecture Design 성균관대학교 조 준 동 교수, 1999. 8"— Presentation transcript:

1 L29:Lower Power Embedded Architecture Design 성균관대학교 조 준 동 교수, 1999. 8 http://vada.skku.ac.kr

2 Low Power MPU

3 Levels for Low Power Design

4 Present- Day Digital Systems Current systems are complex and heterogenous Contain many different types of components –Programmable and Re-configurable processors –Application- specific integrated circuits (ASICs) –Application-specific Instruction processor (ASIP) –Read- Only Memory (ROM) and RAM –I/ O devices and circuitry Typically designed from a (large) software specification These heterogenous systems are called embedded systems

5 Embedded System Characteristics Limited user programmability –Completely transparent to user, e. g. automotive engine control –Limited user interface e. g., intelligent telephones –Programmable through application specific language e.g., postscript printer Real- time response No batch processing

6 Embedded Systems: Products - 1 Computer Related personal digital assistant printer disc drive multimedia subsystem graphics subsystem graphics terminal Communications cellular phone video phone fax modems PBX Consumer Electronics HDTV CD player video game video tape recorder programmable TV camera music system

7 Embedded Systems: Products - 2 Control Systems –Automotive:engine, ignition, brake system –Manufacturing process control: robotics –Remote control: satellite control, spacecraft control –Other mechanical control: elevator control Office Equipment –smart copier, printer, smart typewriter, calculator –point- of- sale equipment, credit- card validator,UPC code reader, cash register Medical Applications: instruments( EKG, EEG), scanning, imaging

8 Problem Domain Shift

9 Embedded System Trends - I Microcomponents grow in importance in IC industry due to their reusability: DSP,  P,  C More embedded systems will require ASICs –From 20- 70% in 1992 to 60- 70% in 1996 Moral of the story: u-P are joining with high- speed highly-complex ASIC in embedded systems

10 Embedded System Trends - II Embedded systems will require more application software –Average moves from 16- 64k lines in 1992 to 64k-512k in 1996 –Requires migration from assembler to C/ C++, implying requirement for automatic compilation –From 40- 70% of programmers versus ASIC designers in 1992 to 60- 90% in 1996 Moral of the story: Increase in code- size / code- complexity is causing a migration to C/ C++ from assembly coding

11 Embedded Software Optimization Code size becomes an important objective Software will eventually become a part of the chip: –Need to generate the best possible code –Can afford longer compilation time Need not only traditional optimization techniques, but also new application- domain-specific optimizations (e. g., DSP and microcontroller architectures)

12 Implementing Digital Systems

13 What is an ASIP? Application- Specific Instruction Processor Processor architecture tailored not just for application domain (e. g., DSP, microcontrollers), but for specific sets of applications (e. g., audio, engine control) ASIP characteristics –Greater design cost (processor + compiler) –+ Higher performance, lower power than commercial cores, more flexibility than ASIC

14 ASIP Design Given a set of applications, determine  architecture of ASIP (i. e., configuration of functional units in datapaths, instruction set) To accurately evaluate performance of processor on a given application need to compile the application program onto the processor datapath and simulate object code However, the  architecture of the processor is a design parameter!

15 Processor Design Flow

16 Required Compiler Optimizations Machine independent optimizations –Parallelizing transformations (lots of them!) Common subexpression elimination, Strength reduction, Code motion Machine dependent optimizations –Loop unrolling and software pipelining –Static allocation (non- recursive procedure calls) –Storage layout (arrays, scalars) –Optimization of mode setting instructions –  Instruction selection, scheduling, and register allocation

17 Common Subexpression Elimination

18 Constant Propagation and Folding

19 Dead Code Elimination

20 Loop Invariant Code Motion

21 Array Access Strength Reduction


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