1. 1 August 15 Electromagnetic compatibility of Integrated Circuits INSA Toulouse - France September 2013 www.ic-emc.org www.alexandre-boyer.frwww.alexandre-boyer.fr > Enseignement Etienne SICARD INSA/DGEI University of Toulouse 31077 Toulouse - France Etienne.sicard@insa-toulouse.fr Alexandre BOYERINSA/DGEIUniversity of Toulouse31077 Toulouse - FranceAlexandre.boyer@insa-toulouse.fr

2. 2 August 15 Objectives Through lectures (16 H)  Understand parasitic emission mechanisms  Introduce parasitic emission reduction strategies  Give an overview of emission and susceptibility measurement standards  Power Decoupling Network modelling  Basis of conducted and radiated emission modelling  Basis of immunity modelling  Understand the role of decoupling at printed-circuit-board level  Acquire basic knowledge of design for improved EMC at PCB and IC level Illustrate basic concepts through simulation (10 H) IC modeling case study using DSPIC (10 H)

3. EMC of ICs An overview

4. Outlines Electromagnetic interference What is EMC EMC at IC level Origin of parasitic emission Trends towards higher emission Origin on susceptibility Emission issues Susceptibility issues Standardization issues Conclusion 4 August 15

5. 5 EMI ISSUES IN WIRELESS DEVICES Numerous interference cases reported over the ISM band 2400 – 2483.5 MHz. From Cisco, « 20 Myths of WiFi Interference », White Paper, 2008: “Interference contributes to 50 % of the problems on the customer’s Wi-Fi network. “ “In a recent survey of 300 of their customers, a major Wi-Fi tools provider reported that “troubleshooting interference won ‘top honors’ as the biggest challenge in managing a Wi-Fi network.”” “67 percent of all residential Wi-Fi problems are linked to interfering devices, such as cordless phones, baby monitors, and microwave ovens.” “At 8m, a microwave oven degrades data throughput by 64%.” Electromagnetic Interference August 15

6. 6 « The ability of a component, equipment or system to operate satisfyingly in a given electromagnetic environment, without introducing any harmful electromagnetic disturbances to all systems placed in this environment. » Essential constraint to ensure functional safety of electronic or electrical applications Guarantee the simultaneous operation of every electrical or electronic equipment in a given electromagnetic environment Reduce both the parasitic electromagnetic emission and the sensitivity or susceptibility to electromagnetic interferences. What is EMC ? DEFINITION August 15

7. 7 100 mm 10 mm EMC at IC Level ZOOM AT DEVICES

8. 8 August 15 Integrated Circuits… © Intel Xeon 1 µm 100 nm 1 V 100 µA 10µm 1mm

9. 9 August 15 EMC at IC Level WHY EMC OF IC ? Until mid 90’s, IC designers had no consideration about EMC problems in their design.. Starting 1996, automotive customers started to select ICs on EMC criteria Starting 2005, mobile industry required EMC in System in package Massive 3D integration will require careful EMC design

10. Technology Complexity Packaging 2004 130nm 100M Core+ DSP 1 Mb Mem Core+ DSP 1 Mb Mem Embedded blocks 2006 90nm 250M Core DSPs 10 Mb Mem Core DSPs 10 Mb Mem 2008 45nm 500M Dual core Dual DSP RF Graphic Process. 100 Mb Mem Sensors Dual core Dual DSP RF Graphic Process. 100 Mb Mem Sensors 2010 32nm 2G Quad Core Quad DSP 3D Image Proc Crypto processor Reconf FPGA, Multi RF 1 Gb Memories Multi-sensors Quad Core Quad DSP 3D Image Proc Crypto processor Reconf FPGA, Multi RF 1 Gb Memories Multi-sensors 22nm 2012 7G INCREASED INTEGRATED CIRCUIT COMPLEXITY 5nm 150 G 2020 ? ? EMC at IC Level

11. 11 August 15 Emission of EM waves Susceptibility to EM waves TWO MAIN CONCEPTS Personnal entrainments Safety systems interferences Hardware fault Software failure Function Loss Components Equipements Carbon airplane Boards Radar EMC at IC Level

12. 12 August 15 Susceptibility Chip Emission PCB System Components System Integrated circuits are the origin of parasitic emission and susceptibility to RF disturbances in electronic systems Noisy IC Sensitive IC Interferences THE ROLE OF ICS AS PERTURBATION SOURCE AND VICTIM Radiation Coupling EMC at IC Level

13. 13 August 15 VDD VSS Output capa Vin Origin of Parasitic Emission BASIC MECHANISMS FOR CURRENT SWITCHING IDD ISS Switching current Voltage Time Question: waveform, amplitude? CMOS inverter exemple

14. 14 August 15 Basic > interconnects > GateSwitching.sch Origin of Parasitic Emission CMOS INVERTER IN IC-EMC Switching current Voltage Time Waveforms strongly depend on load

15. 15 August 15 Origin of Parasitic Emission STRONGER SWITCHING CURRENT: 50ps i(t) Time Switching gates Internal switching current Vdd Vss i(t) Main transient current sources:  Clock-driven blocks, synchronized logic  Memory read/write/refresh  I/O switching Very large Simultaneous Switching Current i(t) Time

16. 16 August 15 Origin of Parasitic Emission EXAMPLE: EVALUATION OF DSPIC SWITCHING CURRENT ____ VDD, ___ technology ____ mA / gate in ____ ps ____ gates in ____ Bit Micro => ____ A ____ % switching activity => ____ A ____ % current peak spread (non synchronous switching) ____ in ____ ps ____ Current (A) ____ ns time Vdd Vss i(t) Current / gate Current (A) ____ ns time Current / Ic ____

17. 17 August 15 M. Ramdain, E. Sicard, “The Electromagnetic Compatibility of Integrated Circuits—Past, Present, and Future”, IEEE Trans. EMC, VOL. 51, NO. 1, Feb. 2009 Origin of Parasitic Emission REFERENCES: CURRENT, DECAP VS TECHNOLOGY

18. Origin of Parasitic Emission 18 August 15 Vss Vdd Wires act as antennas V(t) Time

19. Origin of Parasitic Emission 19 August 15 WIRES+CURRENT = NOISE DSPIC33F noise measurement with active probe on X10 Activation of the core by a 40 MHz internal PLL Synchronous ADDR0..15 bus switching 0x0000, 0xFFFF DSPIC_VDD_VofT.tran

20. Origin of Parasitic Emission 20 August 15 WIRES RADIATE

21. 21 August 15 Stronger di/dt Increase parasitic noise Time New process Volt Old process WHY TECHNOLOGY SCALE DOWN MAKES THINGS WORSE ? Current level keeps almost constant but: Faster current switching Current level keeps almost constant but: Faster current switching Time Current di/dt New process Old process Emission Issues

22. 22 August 15 Susceptibility issues 100 mV margin 100 mV margin 5.0 3.3 2.5 1.8 0.5µ0.35µ0.18µ 90n 65n Technology 1.0 Supply (V) 1.2 45n I/O supply Core supply 32n DECREASED NOISE MARGIN IN ICS 22n 17n 130n 500 mV margin 500 mV margin Adapted from ITRS roadmap for semiconductors, 2011

23. Thunderstorm impact UNINTENTIONAL ELECTROMAGNETIC SOURCES TV UHF Radars 2-4G BS 1W1W Frequency 1MW 1KW 1GW Weather Radar 3 MHz30 MHz300 MHz3 GHz30 GHz300 GHz Power 1mW HFVHFUHFSHFxHFTHF 3G TV VHF 2G 4G Fields radiated by electronic devices Continuou s waves & pulsed waves 25m 25mm 0.25m2.5mm 2.5m /4 (ideal antenna) 0.25mm Susceptibility Issues August 15

24. 24 August 15 EMC Level (dB) -40 -30 -20 -10 0 10 20 30 40 50 1101001000 Sum of perturbations Susceptibility level High risk of interference Safe interference margin Unsafe margin Frequency (MHz) Susceptibility Issues SYSTEM-ON-CHIP, 3D STACKING: DANGER

25. Conclusion EMI reported in all kinds of devices IC involved in many EMI problems IC technology evolution towards higher complexity On-chip switching currents in the 10-100 A range ICs are good antennas in the GHz range Increased switching noise Increased emission issues Reduced noise margins System-on-chips, systems-in- package rise new EMC issues 25 August 15