Automating Thermo-Mechanical Warpage Estimation of PCBs/PCAs Using a Design-Analysis Integration Framework Presenter: Russell Peak Authors: Manas Bajaj.

Name: Automating Thermo-Mechanical Warpage Estimation of PCBs/PCAs Using a Design-Analysis Integration Framework Presenter: Russell Peak Authors: Manas Bajaj.
Uploaded: 2017-07-03T20:23:43+00:00
Duration: PTM42S23
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Description: Automating Thermo-Mechanical Warpage Estimation of PCBs/PCAs Using a Design-Analysis Integration Framework Presenter: Russell Peak Authors: Manas Bajaj.

Automating Thermo-Mechanical Warpage Estimation of PCBs/PCAs Using a Design-Analysis Integration Framework Presenter: Russell Peak Authors: Manas Bajaj (Georgia Tech), Russell Peak (Georgia Tech), Dirk Zwemer (AkroMetrix), Thomas Thurman (Rockwell Collins), Lothar Klein (LKSoft), Giedrius Liutkus (LKSoft), Kevin Brady (NIST), John Messina (NIST), Mike Dickerson (InterCAX) v

Abstract Accurate prediction, validation and reduction of thermally-induced PCB warpage are critical for enhancing manufacturing yield and reliability in time-to-market driven electronics product realization. In this paper, we describe a methodology to simulate thermally-induced warpage of PCBs and PCAs. We will demonstrate this analysis methodology using the following path: read ECAD designs from Mentor Graphics Board Station, identify features relevant to warpage analysis, create idealized analysis models, select solution technique and create solver-specific models (e.g. ANSYS and ABAQUS models for finite-element solution), identify warpage hotspots and calculate metrics to assist PCB/A designers in reducing warpage. We shall also present initial results from experimental verification of this technique using a shadow moiré (TherMoiré®) method. This methodology provides highly automated simulation capabilities using analysis concepts, idealizations, and solution techniques for modularized and configurable simulation studies. It leverages open standards including ISO (STEP AP210 – and Standard Data Access Interface - see Resources: (a) (b) MB,RP et al., PWB/PWA Warpage, May 2006

Contents Warpage Context Sample simulation results and validation
Definition and impact PCB/A features affecting warpage Requirements for warpage analysis Sample simulation results and validation Bare boards (PCBs) Assembled boards & chip pkgs. (PCAs, BGAs) Methodology and tools Multi-representation architecture Tool availability Summary MB,RP et al., PWB/PWA Warpage, May 2006

Electronics Product Realization
Doc/Proc/Reg Guidelines Layout Requirements Design Part Symbol & Footprint Functional Placement Routing Review Learn today Utilize tomorrow Corrections Release Environmental Build Fabricate Assemble Test/Inspect MB,RP et al., PWB/PWA Warpage, May 2006

Warpage - Definition WARPAGE is out of plane deformation of the artifact, caused by differential (non-homogenous) shrinkage or expansion of elements composing the artifact. Warpage of 2D artifacts ( basic modes) Out of plane deformation of a linear element Saddle Deformation Basic Model  = (b L2 T) / t where L: Undeformed Length; t: Undeformed Thickness; T: Temperature Change; b: Specific Coefficient of Thermal Bending Bowl Deformation MB,RP et al., PWB/PWA Warpage, May 2006

PCA/B Warpage - Illustration
Undeformed Shape Deformed Shape MB,RP et al., PWB/PWA Warpage, May 2006

Warpage – Impact and Requirements Ref: Thinking Globally, Measuring Locally Editorial by Patrick Hassell, AkroMetrix Impact Low manufacturing yield and high rework of interconnects Lack of co-planarity of component footprints Fine pitch technology Low solder paste volume Requirements Managing warpage requirements Enforce local warpage requirements Relax global warpage requirements RESEARCH QUESTIONS: ================ (1) Can we model the PCB with features and predict its warpage under a given thermal loading profile? Identification of warpage “hotspots”? (2) How do we validate predicted warpage? Theoretical and experimental validation (3) Can we develop thermo-mechanical warpage profile of a PCB over the span of engineering activity? PCB fabrication PCB-based assembly PCA usage MB,RP et al., PWB/PWA Warpage, May 2006

Warpage Effects [after Ding, 2003; Zwemer, 2006; et al.]
Estimated Impact: $100M / year Factors CTE mismatch: global & local Temperature / humidity variation Temperature / humidity gradient Material rigidity Thermal conductivity Geometric size & aspect ratio Component layout Consequences Misregistration Solder opens Solder shorts Delamination Solder fatigue Die cracking Underfill Molding Die/Chip BGA Substrate Vias Solder Balls PWB MB,RP et al., PWB/PWA Warpage, May 2006

Complex Features Affecting Thermo-Mechanical Behavior PCB Level
PCB Layout Features on PCB - Notional Figure Footprint occurrence Via Traces Complete trace curve not shown Land Stackup Where do we obtain detailed information? PCB outline Plated through hole M150P2P11184 M150P1P21184 Mechanical (tooling / drilling) hole MB,RP et al., PWB/PWA Warpage, May 2006

Solder Balls (Diagonal Grid Pattern)
Complex Features Affecting Thermo-Mechanical Behavior PCA Level: Complex Components Isometric View Side View Solder Resist Cu Foil BT-Resin Core Mold Resin Si Chip Die Attach Solder Balls (Diagonal Grid Pattern) Photo: MB,RP et al., PWB/PWA Warpage, May 2006

Requirements for Warpage Analysis
Availability of a rich product model ECAD design details PCB layer stackup details Material behavior and properties Analysis model creation capabilities Idealized PCB/A features Boundary conditions Thermal loading FEA model creation and solution capabilities FE mesher FE solver MB,RP et al., PWB/PWA Warpage, May 2006

Instance Browser/Editor
Rich Product Model Electrical CAD Tools Mechanical CAD Tools Systems Engineering Tools Eagle Pro/E Doors Traditional Tools Mentor Graphics NX Teamcenter Requirements … AP210 AP203, AP214 AP233, SysML Collective Product Model Building Blocks: Information models & meta-models: International standards Industry specs Corporate standards Local customizations Modeling technologies: Express, XML, UML, OWL, … XaiTools PWA-B LKSoft, … Gap-Filling Tools EPM, LKSoft, Theorem, … STEP-Book AP210, SDAI-Edit,... Instance Browser/Editor PWB Stackup Tool, … pgef Engineering Framework Tool AP210 AP2xx Standards-based Submodels MB,RP et al., PWB/PWA Warpage, May 2006

STEP AP210 (ISO 10303-210) Domain: Electronics Design
~1200 standardized concepts (many applicable to other domains) Development investment: O(100 man-years) over 10+ years Product Enclosure External Interfaces Printed Circuit Assemblies (PCAs/PWAs) Die/Chip Package Packaged Part Interconnect Assembly Printed Circuit Substrate (PCBs/PWBs) Configuration Controlled Design of Electronic Assemblies, their Interconnection and Packaging MB,RP et al., PWB/PWA Warpage, May 2006 Adapted from version by Tom Thurman, Rockwell-Collins

STEP AP210 (ISO 10303-210) Scope http://www.ap210.org
Used for warpage analysis Functional Models Requirements Models Component / Part Models Analysis Support Package Material Product Properties “White Box”/ “Black Box” Test Bench Functional Unit Interface Declaration Network Listing Simulation Models Signals Test Bench Design Constraints Interface Allocation Rules Models Design Manufacturing … Interconnect Models Assembly Models Usage View & Design View Bare Board Design Layout Templates Layers and Layer Technologies Stackup User View Design View Component Placement Material Product Complex Assemblies with Multiple Interconnects Configuration Mgmt Identification Authority Effectivity Control Net Change Geometric Models 2D 3D CSG, Brep… EDIF, IPC, GDSII compatible “trace” model Design Control Geometric Dimensioning and Tolerancing MB,RP et al., PWB/PWA Warpage, May 2006

Example Design in STEP Book AP210 Pro (PCB Layout View)
Originating ECAD Model from: Mentor Board Station Current Tool: STEP Book AP210 v2.3 Current Model based on: STEP AP210 MB,RP et al., PWB/PWA Warpage, May 2006

Example Design in XaiTools PWA-B 2.0.b1 Stackup Editor
Originating ECAD from: Mentor Board Station Current Tool: XaiTools PWA-B v2.0.b1 Current Model based on: STEP AP210 MB,RP et al., PWB/PWA Warpage, May 2006

PCB Warpage Analysis Model Creation
AP210-based Manufacturing Product Model Context Building Block-based Analysis Model Single Layer View width length … Top view of “effective” grid elements in top layer of the PCB Effective Material Property Computation … Side view of the PCB with “effective” grid elements across the stratums thickness Given: Thermal loading profile Boundary Conditions (mostly displacement) Idealize PWB stackup as a layered shell Context Attributes Thermal loading profile Boundary Conditions (mostly displacement) Idealize PWB stackup as a layered shell Grid (Sieve) Size MB,RP et al., PWB/PWA Warpage, May 2006

Chopped PCB Regions for Analysis in XaiTools PWA-B 2.0.b1
First (Top) Design Layer Second (Bottom) Design Layer MB,RP et al., PWB/PWA Warpage, May 2006

Example Design - Coeff. of Thermal Bending Results in XaiTools PWA-B 2.0
Regions with greatest mismatch MB,RP et al., PWB/PWA Warpage, May 2006

Example Design – Finite Element Model Creation and Solution Input to ANSYS
ANSYS APDL-based description for creating and solving the finite-element model XaiTools PWA-B 2.0.b1 MB,RP et al., PWB/PWA Warpage, May 2006

Example Design – FEA Warpage Results Out-of-plane deformation
Conditions T = 125 deg. C - uniform heating from 25 deg. C to 150 deg. C Y-min and Y-max edges are fully constrained MB,RP et al., PWB/PWA Warpage, May 2006

Identification of warpage “hotspots” on a PCB
Overall Process - Circuit Board Stackup Design & Warpage Analysis Using AP210 (WIP) GIT and NIST EEEL in collaboration with AkroMetrix, InterCAX/LKSoft, and Rockwell Collins width length … thickness ECAD and STEP AP210-based Product Model Analysis Building Block Model (idealized bodies with effective material properties) Design Improvement Feedback PCB Warpage Profile (given: thermal profile + boundary conditions) CTB Map (smeared property to identify material distribution) Identification of warpage “hotspots” on a PCB MB,RP et al., PWB/PWA Warpage, May 2006

Physical Measurements in TherMoiré oven chamber
PCB Warpage: Validation Results Simulation Results Physical Measurements in TherMoiré oven chamber Measurement Results SMM - FEA Mesh Model 0 C MB,RP et al., PWB/PWA Warpage, May 2006

BoardStation “Module 10” Example in SB210 Pro v2.3
9 layer board MB,RP et al., PWB/PWA Warpage, May 2006

Module 10: Idealization Grids for Effective Material Properties
MB,RP et al., PWB/PWA Warpage, May 2006

Module 10: CTB Maps MB,RP et al., PWB/PWA Warpage, May 2006

Module 10: FEA Warpage Results
out-of-plane deformation (Uz) in inches delta T = 150 C MB,RP et al., PWB/PWA Warpage, May 2006

Recent Production Test Cases
—- Need more Mentor designs for testing — (collaboration opportunity!) MB,RP et al., PWB/PWA Warpage, May 2006

Design-07 Proprietary Image Deleted 559 components 10 circuit layers
PCA viewed in STEP Book AP210 Pro Design-07 559 components 10 circuit layers Source ECAD Tool: Zuken Visula Proprietary Image Deleted Co-efficient of Thermal Bending (per deg C) Warpage Profile (z-axis deflection) – 25C to 150 C MB,RP et al., PWB/PWA Warpage, May 2006

Design – 02MOD Proprietary Image Deleted 1757 components
PCA viewed in STEP Book AP210 Pro Design – 02MOD 1757 components 12 circuit layers Source ECAD Tool: Zuken Visula Proprietary Image Deleted Co-efficient of Thermal Bending (per deg C) Warpage Profile (z-axis deflection) – 25C to 150 C MB,RP et al., PWB/PWA Warpage, May 2006

PCA Warpage Automated Analysis Model Creation
MB,RP et al., PWB/PWA Warpage, May 2006 PCB = printed circuit board (bare board) PCA = printed circuit assembly = PCB + components, etc.

Automated PCA design warpage analysis
Case 1: 1 PBGA 265 on top Automated PCA design warpage analysis U3 MB,RP et al., PWB/PWA Warpage, May 2006

Case 2: 2 PBGA 265s on top U3 MB,RP et al., PWB/PWA Warpage, May 2006

Case 3: 3 PBGA 265s on top Qualitative comparison
- Different board & components (somewhat similar) - Good warpage shape results comparison - Similar total warpage results (2.2 mils vs. 1.7 mils = ~23% delta) [Ding, 2004] results InterCAX results XaiTools Electronics (SBIR Phase 1 prototype) Total Warpage for T=150C: = in [scaled from 0.07 T=183C] Total Warpage for T=150C: in MB,RP et al., PWB/PWA Warpage, May 2006

Dense off-pitch body interactions (challenging for FEA meshers)
Case 4: PCA with top & bottom PBGAs Analytical model in IDA-STEP as imported from AP203 Produced by idealizing AP210-based PCB design (from ECAD tool) and combining with idealized chip package models in XaiTools Electronics prototype (XE), and exporting as AP203 Bare PCB Two PBGA 265 (top side) One PBGA 441 (bottom side) Dense off-pitch body interactions (challenging for FEA meshers) MB,RP et al., PWB/PWA Warpage, May 2006

Case 4: PCA with top & bottom PBGAs Mesh model in Abaqus as imported from native Abaqus format
[xx - view needs update] MB,RP et al., PWB/PWA Warpage, May 2006

Case 4: PCA with top & bottom PBGAs FEA mesh model in Abaqus (cont.)
Mesh in dense chip package solder ball regions Auto-generated mesh between chip package substrate layers, solder balls, and PCB layers [xx - view needs update] (same region in full wireframe view) MB,RP et al., PWB/PWA Warpage, May 2006

Case 4: PCA with top & bottom PBGAs Solved FEA model in Abaqus
Warpage (u3 = out-of-plane deformation) Preliminary Warpage Results (to be further validated in Phase 2) PCA top Results - Case 4: - Demonstrated FEA meshing feasibility (main challenge) - Good results, trends, and compatibility with similar cases [Ding, 2004; Powell, 2006] - Results reveal anticipated asymmetric effects - High fidelity PCB model considers local feature density differences - Future work will try more effective idealizations (ex. shells) & correlate with physical measurements PCA bottom Bare board (PCB) warpage MB,RP et al., PWB/PWA Warpage, May 2006

Case 5: PBGA Chip Package on Sample PCB Deformation magnitude results: PCA 6230 (w/ PBGA 441)
Known Results [Zeng, 2004; Shinko] InterCAX SBIR Phase 1 Results XCP + Patran pre-processing Abaqus solving and Patran post-processing XE + Simmetrix pre-processing Abaqus solving and post-processing Phase 1 Results - Case 5 - Excellent comparison of deformation pattern - Very good comparison of max. warpage values (1.61 mils vs mils = ~7% delta) - Possible deviation causes: different meshing approach, different solver version, etc. MB,RP et al., PWB/PWA Warpage, May 2006

PCA Warpage Capabilities
NIST SBIR FY05 Program  InterCAX Phase 1 Project  July, January, 2006 Main Phase 1 results Successfully demonstrated feasibility of auto-generating complex FEA models from AP210-based ECAD designs Included localized board properties key for warpage prediction Achieved good correlation with published results (within 7%) Reduced simulation time by 80% for benchmark case Automatically simulated design configurations ~5 times larger than previously practical Excellent outlook for next steps Phase 2 Services and tools for industry MB,RP et al., PWB/PWA Warpage, May 2006

Effective Materials Properties
Multi-Representation Architecture (MRA) for Design Analysis Integration Tree View Bare PWB Manufacturing Product Model Electrical Mechanical Manufacturability Analysis Product Model Context-Based Analysis Model Warpage PTH Fatigue Layered Shell Effective Materials Properties Analysis Building Blocks Solution Method Model Finite Element MB,RP et al., PWB/PWA Warpage, May 2006

Multi-Representation Architecture (MRA) for Design Analysis Integration Stepping-Stone Model View
ECAD Tools and Manufacturable Product Model (STEP AP210-based) Analyzable Product Model Context-Based Analysis Model APM Analysis Building Block Printed Wiring Assembly (PWA) Solution Method Model CBAM ABB SMM F APM ABB Printed Wiring Board (PWB) Solder Joint Component Y body 3 2 1 4 T Solder Joint Component PWB ABB SMM Solution Tools (ANSYS, ABAQUS …) MB,RP et al., PWB/PWA Warpage, May 2006

MRA-based Model Browser
Design Artifacts – PCA, PCB, Components, etc. Design Libraries Product-specific Analysis Models Reusable Analysis Models Solution Models and Results – Finite Element Model, etc. MB,RP et al., PWB/PWA Warpage, May 2006

Product & Service Information:
Tool Availability STEP Book AP210 Pro v2.3 Imports & views Mentor Graphics designs: BoardStation (Expedition under development) Enables enrichment & AP210 output XaiTools PWA-B v2.0 Stackup editor Bare board warpage analysis XaiTools Electronics v1.0 (prototype) Assembled board warpage analysis Product & Service Information: MB,RP et al., PWB/PWA Warpage, May 2006

Collaboration Opportunities
Test cases Georgia Tech research project MB,RP et al., PWB/PWA Warpage, May 2006

Summary Automated board warpage analysis
Bare board stackup design and warpage analysis Assembled board warpage analysis Use of rich product models to drive high-fidelity analyses AP210 interface to Mentor Graphics ECAD tools Commercial tools and services Collaboration opportunities Georgia Tech research project Test cases MB,RP et al., PWB/PWA Warpage, May 2006

References InterCAX warpage resources
Georgia Tech-NIST project for bare board warpage simulation Hai Ding (2004) Prediction and Validation of Thermomechanical Reliability in Electronic Packaging. Doctoral Dissertation, Georgia Institute of Technology, Atlanta. Reinhard Powell (2006) Development of FE Prediction Tools and Convective Solder Reflow Projection Moiré Warpage Measurement System. Doctoral Dissertation, Georgia Institute of Technology, Atlanta. Sai Zeng (2004) Knowledge-based FEA Modeling for Highly Coupled Variable Topology Multi-body Problems. Doctoral Dissertation, Georgia Institute of Technology, Atlanta. MB,RP et al., PWB/PWA Warpage, May 2006

NIST Disclaimer This document may identify commercial product names and materials by other parties to describe certain procedures or to provide concrete examples (i.e., to help clarify abstract concepts via specific instances). In no case does product or material identification imply recommendation or endorsement by the authors or their organizations, nor does it imply that such items are necessarily the best available for the purpose. Company, product, or service names may be included that are trademarks or service marks of others. MB,RP et al., PWB/PWA Warpage, May 2006

MB,RP et al., PWB/PWA Warpage, May 2006

Automating Thermo-Mechanical Warpage Estimation of PCBs/PCAs Using a Design-Analysis Integration Framework Presenter: Russell Peak Authors: Manas Bajaj.

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Automating Thermo-Mechanical Warpage Estimation of PCBs/PCAs Using a Design-Analysis Integration Framework Presenter: Russell Peak Authors: Manas Bajaj.

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Presentation on theme: "Automating Thermo-Mechanical Warpage Estimation of PCBs/PCAs Using a Design-Analysis Integration Framework Presenter: Russell Peak Authors: Manas Bajaj."— Presentation transcript:

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