1. Counters
Clocked sequential circuit whose state diagram contains a single cycle.
Modulus – number of states in the cycle.
Counters with non-power of 2 modulus has unused states

2. Ripple Counters Ripple counter.
Requires fewer components than other counters.
Slowest one.

3. Synchronous Counters Synchronous counters. Synchronous serial counter.
The clock inputs of all flip-flops in the counter circuit are connected to a common clock signal.
Synchronous serial counter.

4. Counters
Synchronous parallel counter.

5. MSI Counters – 74x163

6. MSI Counters – 74x163

7. 74x163 – Free Running Mode

8. 74x163 – Modulo 11 Counters

9. 74x163 – Excess-3 Counter

10. 74x163 – Cascading Counters

11. 74x163 – Modulo 193 Counter

12. 74x163 – Modulo 8 Counter With Decoder

13. 74x163 – Modulo 8 Counter With Decoder
Modulo 8 counter with decoder and glitch-free outputs.

14. Shift Registers
N-bit register with the provision for shifting its stored data by a bit position each tick of the clock.
Serial input – specifies a new bit to shifted into the register.
Serial output – specifies the bits being shifted out of the register

15. Shift Registers
Parallel input – specifies a new set of bits to be entered into the register, all at once during a single clock tick.
Parallel output – specifies the bits at the output of every flip-flop in the register.

16. Shift Registers
Serial-in, parallel-out shift register.

17. Shift Registers
Parallel-in, serial-out shift register.

18. Shift Registers MSI Shift Registers.
74x164 – serial-in, parallel-out with asynchronous clear input.
74x166 – parallel-in, serial-out with asynchronous clear input.
74x194 – universal shift register.

19. Shift Registers

20. Shift Registers
Shift register counter – a circuit formed by a shift registers and combinational logic. The state diagram for this state machine is cyclic. This circuit does not necessarily count in ascending or descending order.
Ring Counter – the simplest shift register counter. This circuit uses a n-bit shift register to obtain a counter with n states.

21. Shift Registers

22. Shift Registers

23. Shift Registers
A self correcting counter is designed so that all abnormal states have transitions leading to normal states.

24. Shift Registers
Twisted-ring, Moebius or Johnson counter is a n-bit shift register whose serial input receives the complement of serial output.
This counter has 2n states.

25. Shift Registers Digital telephony.
Central offices samples analog voice 8000 times/sec (once every 125μs).
Then the COs transmit them digitally over a 64kbps serial channel.
64kbps is much less than can be achieved by a single digital line, therefore several 64kbps signals are multiplexed onto a single wire.

26. Shift Registers

27. Shift Registers

28. Shift Registers

29. Shift Registers