1. CIS 020 Assembly Programming Chapter 14 - Instruction Formats & Interrupt Codes for DEBUGGING PROGRAMS © John Urrutia 2012, All Rights Reserved.5/27/20121

2. Objectives Instruction Formats – how mnemonics are translated Decoding The PSW and what it can tell you Common system interrupt codes and what they really mean The System ABEND Dump © John Urrutia 2012, All Rights Reserved.25/27/2012

3. Standard Instruction Formats Each instruction is in one of 26 basic formats: E, I, RI, RIE, RIL, RIS, RR, RRD, RRE, RRF, RRS, RS, RSI, RSL, RSY, RX, RXE, RXF, RXY, S, SI, SIL, SIY, SS, SSE, and SSF, with two variations of RRF, RS, RSY, RX, and RXY, three of RI and RIL, and six of RIE and SS. 45 formats in all. We will only examine the most common with their variations. © John Urrutia 2012, All Rights Reserved.35/27/2012

4. Instruction lengths Every Instruction is: 2, 4, or 6 bytes in length or 1, 2, or 3 halfwords respectively. Consists of an Operation Code (Op Code) & one or more operands. The size of the instruction is embedded in the Operation Code in bits 0 and 1. 00 – 2 bytes - Register to Register 01 or 10 – 4 bytes - Register to Storage 11 – 6 bytes - Storage to Storage © John Urrutia 2012, All Rights Reserved.45/27/2012

5. Reference - zArchitecture zArchitecture Principles of Operations.pdf figure 7.1 – 7-13 thru 7-24 © John Urrutia 2012, All Rights Reserved.55/27/2012

6. RR – Register to Register RR – are the fastest instructions. 2 Byte instruction Length with the coding format Translates to © John Urrutia 2012, All Rights Reserved.65/27/2012 B'0001 1100 1010 1000' X' 1 C 6 8'

7. RS – Register to Storage RS – Transfer data between a register and storage. 4 Byte instruction Length with the coding format Translates to © John Urrutia 2012, All Rights Reserved.75/27/2012 B'1001 0000 1110 1100 1101 0000 0000 1100' X' 9 0 E C D 0 0 C'

8. RX – Register to Indexed Storage RX – Transfer control by mask to storage address. 4 Byte instruction Length with the coding format Translates to © John Urrutia 2012, All Rights Reserved.85/27/2012 B'0100 0111 1111 0101 0110 0011 1111 1000' X' 4 7 F 5 6 3 E 8'

9. RX – Register to Indexed Storage RX – Transfer data between a register and storage. 4 Byte instruction Length with the coding format Translates to © John Urrutia 2012, All Rights Reserved.95/27/2012 B'0100 0000 0100 0101 0110 0011 1111 1000' X' 4 0 4 5 6 3 E 8'

10. SI – Storage Immediate SI –Data imbedded in instruction to storage. 4 Byte instruction Length with the coding format Translates to © John Urrutia 2012, All Rights Reserved.105/27/2012 B‘1001 0101 0110 1111 0110 0011 1111 1000' X' 9 5 6 F 6 3 E 8'

11. Storage to Storage Instructions Least efficient instructions SS Formats © John Urrutia 2012, All Rights Reserved.115/27/2012

12. SS – Storage to Storage SS – Storage to Storage, Character Format 6 Byte instruction Length with the coding format Translates to © John Urrutia 2012, All Rights Reserved.125/27/2012 B‘1101 0010 1111 1111 0101 0000 0000 1100 0110 0000 0000 0000' X' D 2 F F 5 0 0 C 6 0 0 0'

13. SS – Storage to Storage SS – Storage to Storage, Packed Decimal Format 6 Byte instruction Length with the coding format Translates to © John Urrutia 2012, All Rights Reserved.135/27/2012 B‘1111 0010 0011 0110 0101 0000 0000 1100 0110 0000 0000 1000' X' F 2 3 6 5 0 0 C 6 0 0 8'

14. SS – Storage to Storage SS – Storage to Storage, Shift Packed Decimal Format 6 Byte instruction Length with the coding format Translates to © John Urrutia 2012, All Rights Reserved.145/27/2012 B‘1111 0010 0011 0100 0101 0000 0000 1100 0000 0000 0000 0011' X' F 0 3 4 5 0 0 C 6 0 0 3'

15. Program Interrupts & the PSW Program interrupts occur when you tell the system to do something it can’t. Old School – System simply stops working Today – System is built with redundancy and continues to work while suspending your program execution When an interrupt occurs, generally your program is terminated with an appropriate system code. There are 5 types of interrupts © John Urrutia 2012, All Rights Reserved.155/27/2012

16. Program Interrupts & the PSW There are 5 types of interrupts External – caused by an action outside of the system. I/O problem – external or internal associated with I/O subsystem Program – caused by a faulty instruction or address Machine – hardware, faulty circuit or equipment Supervisor – caused by an error detected by the Supervisor Program. © John Urrutia 2012, All Rights Reserved.165/27/2012

17. Program Interrupts & the PSW The PSW – Program Status Word Identifies the state of the system at the time the interrupt occurred. z390 PSW Consists of the following information PSW=07050600 800FFFDA D2030000D088 MVC ABEND S0C5 © John Urrutia 2012, All Rights Reserved.175/27/2012

18. Program Interrupts & the PSW The PSW – Program Status Word First Word – System status PSW=07050600 800FFFDA D2030000D088 MVC ABEND S0C5 © John Urrutia 2012, All Rights Reserved.185/27/2012

19. Program Interrupts & the PSW The PSW – Program Status Word Second Word – Address of next instruction to execute PSW=07050600 800FFFDA D2030000D088 MVC ABEND S0C5 © John Urrutia 2012, All Rights Reserved.195/27/2012

20. Program Interrupts & the PSW The PSW – Addressing bits 31 &32 When bits 31 and 32 are both zero, 24-bit addressing When bit 31 is zero and bit 32 is one, 31-bit addressing When bits 31 and 32 are both one, 64-bit addressing Next instruction to execute Mnemonic ABEND Code PSW=07050600 800FFFDA D2030000D088 MVC ABEND S0C5 © John Urrutia 2012, All Rights Reserved.205/27/2012

21. In Class Exercise Explain why each of the programs located in H:\Coursework\CIS 20 - Assembly Programming\ Assembly Files\Ch14ABENDs experiences an ABEND. Explain what needs to be done to correct these. Use your book and/or the POPS manual. © John Urrutia 2012, All Rights Reserved.215/27/2012