AND gates and inverters in multiplexer resemble a decoder circuit. 2 n - to – 1 line MUX is constructed from n-to- 2 n decoder by adding 2 n input lines. MUX blocks can be combined in parallel with common selection & enable lines.
4 multiplexers Each capable of selecting one of two input lines. 1A 1Y 1B Input selection line S selects one of lines in each of four MUXs. Enable input E must be active for normal operations.
Inverse of MUX Demultiplexer receives information from a single line and transmits it to one of 2 n possible output lines. Selection of specific output is controlled by bit combination of n selection lines.