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COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji.

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Presentation on theme: "COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji."— Presentation transcript:

1 COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji

2 Review Last Class Performance Definition, Power Wall, Amdahl’s Law Computer Logic, Boolean Integrated Circuits, Decoder, Multiplexor, PLA, ROM, Bus This Class Representation of Integer Addition Subtraction Design of ALU Assignment 2

3 Today Session 1 Bit, Byte, Word Binary Representation of Integer Addition Subtraction Overflow

4 Bit, Byte, and Word 1 Bit – 0 or 1 1 Byte – 8 bits 1 Word – N bytes (in general) 4 bytes in a word (in our book)

5 Most Significant Bit and Least Significant Bit Most Significant Bit (High-Order Bit) The bit position having the greatest value Usually the left-most bit Least Significant Bit (Low-Order Bit) The bit position having the smallest value Usually the right-most bit

6 Binary Representation of Decimal Number Binary 10010101101 Decimal 1×2 10 +0×2 9 +0×2 8 +1×2 7 +0×2 6 +1×2 5 +0×2 4 +1×2 3 +1×2 2 +0×2 1 +1×2 0 =1197 Using a binary number to represent a decimal number Example What is the maximum number a byte can represent?

7 Binary Representation of Integers Unsigned Integers 0 and positive integers only Signed Integers 0, negative, and positive integers Three ways Sign-Magnitude 1’s Complement 2’s Complement

8 Unsigned Integers Consider a word = 4 bytes Can represent numbers from 0 to 4294967295 Decimal: 0 to 2 32 -1 Binary: 0 to 11111111111111111111111111111111 Example 6712 10 = 00000000 00000000 00011010 00111000 2

9 Signed Integer – Sign Magnitude Sign Magnitude Use the most significant bit of the word to represent the sign 0 – Positive 1 – Negative Rest of the number is encoded in magnitude part Example 6712 10 = 00000000 00000000 00011010 00111000 2 -6712 10 = 10000000 00000000 00011010 00111000 2 Two representations of 0 0 = 00000000 00000000 00000000 00000000 -0 = 10000000 00000000 00000000 00000000 Cumbersome in Arithmetic

10 1’s Complement Negative number is stored as bit-wise complement of corresponding positive number Use the most significant bit of the word to represent the sign 0 – Positive 1 – Negative Example 6712 10 = 00000000 00000000 00011010 00111000 2 -6712 10 = 11111111 11111111 11100101 11000111 2 Still two representations of zero 0 = 00000000 00000000 00000000 00000000 -0 = 11111111 11111111 11111111 11111111

11 2’s Complement Positive number represented in the same way as sign-magnitude and 1’s complement Negative number obtained by taking 1’s complement of positive number and adding 1 6712 10 = 00000000 00000000 00011010 00111000 2 1’s comp: -6712 10 = 11111111 11111111 11100101 11000111 2 2’s comp: -6712 10 = 11111111 11111111 11100101 11001000 2 One version of 0 Convenient in arithmetic

12 Integer Addition Example: 7 + 6 00000000 00000000 00000000 00000111 +00000000 00000000 00000000 00000110 00000000 00000000 00000000 00001101 §3.2 Addition and Subtraction

13 Integer Subtraction Subtraction is actually an addition Example: 7 – 6 = 7 + (-6) 2’s complement 00000000 00000000 00000000 00000111 -11111111 11111111 11111111 11111010 00000000 00000000 00000000 00000001

14 Overflow Overflow if result out of range Adding +value and –value operands, no overflow Adding two +value operands Overflow if result sign is 1 Adding two –value operands Overflow if result sign is 0

15 Summary Bit, Byte, Word Binary Representation of Integer Addition Subtraction Overflow

16 Time for a Break (10 mins)

17 Review Last Session Representation of Integer Addition Subtraction This Session 1-bit ALU Unit Next Session Design of ALU

18 Arithmetic Logic Unit Arithmetic Logic Unit (ALU) Heart of a CPU Operations Arithmetic operations Addition Subtraction Logical operations NOT AND OR

19 1-bit Logical Unit for AND and OR 1-bit logical unit for AND and OR

20 1-bit adder

21 1-bit adder truth table

22 Simplifying 1-bit adder If a and b and CarryIn are true, then the three other terms are true as well can be simplified as Values when CarryOut is true

23 Logic of CarryOut Bit

24 Logic of Sum Bit

25 Overall 1-bit ALU

26 Summary 1-bit Adder Logical Design

27 Time for a Break (10 mins)

28 Review Last Session Addition and Subtraction 1-bit ALU This Session 32-bit ALU Fast Carry Lookahead

29 32-bit ALU

30 Subtraction Subtraction can be done by adding a and b’s negate and 1

31 NOR Ainvert =1, Binvert =1, Operation =00

32 Set on less than Set on less than (slt) For comparison of two integers a and b Least significant bit 1 if a < b 0 otherwise Other bits 0

33 Set on less than

34 Handling Overflow

35 32-bit ALU Bit 0-30: normal 1-bit ALU Bit 31: 1-bit ALU with overflow detection

36 Final 32-bit ALU Bnegate Every time we want the ALU to subtract, we set both CarryIn and Binvert to 1 Otherwise, both CarryIn and Binvert are set to 0 NOR operation: Binvert is 1, but CarryIn is Don’t Care We can combine CarryIn and Binvert to a single line of Bnegate

37 Test of Zero We want to quickly test if two integers are equal Design a single signal of Zero

38 Final 32-bit ALU

39 ALU Control Signals

40 Symbol of ALU

41 Faster Addition Carry Lookahead Speeding up addition Determining the carry in to the high-order bits sooner Key mechanism Hardware executes in parallel

42 Explanation of Carry Lookahead Try to remember CarryOuti+1=CarryIni Abbreviation of ci for CarryIni Then c2 can be evaluated faster without waiting for c1 How about c30? Grows rapidly with the number of bits Very complex

43 Fast Carry Using the First Level of Abstraction Consider Generate (gi) and Propagate (pi) Then

44 Generates and Propagates Why gi is called generate? when gi is 1 ci+1 is “generated” Why pi is called propagate? when gi is 0 and pi is 1 ci+1 is “propagated” from ci

45 4-bit CarryIn

46 A Plumbing Analog Wrenches open and close valves ci+1 will be full if the nearest generate value gi is on or pi is on there is water further upstream c0 can result in a carry out without the help of any generates but the help of all propagates

47 Four 4-bit ALUs with Carry Lookahead to form a 16-bit adder

48 Summary 1-bit ALU Logic Functions Arithmetic Functions 32-bit ALU Set on less than Test of Zero Fast Carry Look ahead

49 What I want you to do Review Appendix B Work on your assignment 2 Next Class Computer Clock Register Unit Memory Unit Midterm Review


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