1. ECE 331 – Digital System Design Logic Circuit Design (Lecture #7)

2. ECE 331 - Digital System Design2 Design Concepts Combinational Logic Circuits  Outputs are functions of (present) inputs  No memory  Can be described using Boolean expressions Hierarchical design  Used to solve large design problems  Break problem into smaller (sub-)problems  Solve each sub-problem (i.e. realize design)  Combine individual solutions

3. ECE 331 - Digital System Design3 Design Concepts Specification  Describes the problem to be solved.  Describes what needs to be done, not how to do it. Implementation  Describes how the problem is solved.

4. ECE 331 - Digital System Design4 Design Concepts Issues  Most solutions are not unique. More than one solution may meet the specifications.  Cannot always satisfy all of the requirements.  Must identify (and study) design tradeoffs. Cost Speed Power consumption etc.

5. ECE 331 - Digital System Design5 Design Process 1. Identify requirements (i.e. circuit specifications) 2. Determine the inputs and outputs. 3. Derive the Truth Table 4. Determine simplified Boolean expression(s) 5. Implement solution 6. Verify solution

6. ECE 331 - Digital System Design6 Exercise: Design a combinational logic circuit to meet the following specifications: 1. 3-bit input (A = a 2 a 1 a 0 ) 2. 1-bit output (z) 3. Output is high (logic 1) when 2 < A <= 5.

7. ECE 331 - Digital System Design7 Example: Design a 7-Segment Decoder

8. ECE 331 - Digital System Design8 1. Circuit Specification The 7-Segment Decoder must decode Binary Coded Decimal (BCD) digits so that they can be displayed on a 7-Segment Display. 7-Segment Decoder

9. ECE 331 - Digital System Design9 2. Determine Inputs and Outputs Input: Binary Coded Decimal digits 7-Segment Decoder

10. ECE 331 - Digital System Design10 Binary Coded Decimal Assign a 4-bit code to each decimal digit.  A 4-bit code can represent 16 values.  There are only 10 digits in the decimal number system. Unassigned codes are not used.  How do we interpret these unused codes? Hint: think about K-maps.

11. ECE 331 - Digital System Design11 BCD Digits Decimal DigitBCD Code 00000 10001 20010 30011 40100 50101 60110 70111 81000 91001

12. ECE 331 - Digital System Design12 2. Determine Inputs and Outputs Output: 7-Segment Display 7-Segment Decoder

13. ECE 331 - Digital System Design13 7-Segment Display

14. ECE 331 - Digital System Design14 7-Segment Display

15. ECE 331 - Digital System Design15 3. Derive Truth Table 7-Segment Decoder

16. ECE 331 - Digital System Design16 7-Segment Decoder wxyzABCDEFG# 000011111100 000101100001 001011011012 0011113 0100014 0101105 0110106 0111117 1000118 1001119 1010dd- 1011dd- 1100dd- 1101dd- 1110dd- 1111dd-

17. ECE 331 - Digital System Design17 4. Determine simplified Boolean expression(s) 7-Segment Decoder

18. ECE 331 - Digital System Design18 7-Segment Decoder y z w x 1 00011110 011 0111 dddd 11dd 00 01 11 10 A A = ?

19. ECE 331 - Digital System Design19 7-Segment Decoder y z w x 1 00011110 111 1010 dddd 11dd 00 01 11 10 B B = ?

20. ECE 331 - Digital System Design20 Student Exercise: Determine the minimized Boolean expression for each of the segments of the 7-Segment Display. 7-Segment Decoder

21. ECE 331 - Digital System Design21 5. Implement Solution 6. Verify Solution 7-Segment Decoder

22. ECE 331 - Digital System Design22 Multiple-Output Logic Circuits

23. ECE 331 - Digital System Design23 Example: Given two functions, F 1 and F 2, of the same input variables x 1.. x 4, design the minimum-cost implementation. Multiple-Output Logic Circuits

24. ECE 331 - Digital System Design24 x 1 x 2 x 3 x 4 00011110 11 11 11 11 00 01 11 10 (a) Function 1 f 1 x 1 x 2 x 3 x 4 00011110 11 11 111 11 00 01 11 10 (b) Function f 2 F1 = X1'.X3 + X1.X3' + X2.X3'.X4 F1 = X1'.X3 + X1.X3' + X2.X3.X4 Multiple-Output Logic Circuits

25. ECE 331 - Digital System Design25 f 1 f 2 x 2 x 3 x 4 x 1 x 3 x 1 x 3 x 2 x 3 x 4 (c) Combined circuit for f 1 f 2 and Multiple-Output Logic Circuits

26. ECE 331 - Digital System Design26 Example: Given two functions, F 3 and F 4, of the same input variables x 1.. x 4, design the minimum-cost implementation for the combined circuit. Note: the minimum-cost implementation for the combined circuit may not be the same as the minimum-cost implementations for the individual circuits. Multiple-Output Logic Circuits

27. ECE 331 - Digital System Design27 x 1 x 2 x 3 x 4 00011110 1 11 1 00 01 11 10 (a) Optimal realization of(b) Optimal realization of 1 f 3 f 4 1 1 x 1 x 2 x 3 x 4 00011110 11 1 1 00 01 11 10 1 11 F3 = X1'.X4 + X2.X4 + X1'.X2.X3F3 = X2'.X4 + X1.X4 + X1'.X2.X3.X4' Logic Gates required: 2 2-input AND 1 3-input AND 1 3-input OR Logic Gates required: 2 2-input AND 1 4-input AND 1 3-input OR Total Gates and Inputs required: 8 Logic Gates 21 Inputs Multiple-Output Logic Circuits

28. ECE 331 - Digital System Design28 (c) Optimal realization of f 3 x 1 x 2 x 3 x 4 00011110 1 11 1 00 01 11 10 11 1 x 1 x 2 x 3 x 4 00011110 11 1 1 00 01 11 10 1 11 andtogether f 4 F3 = X1'.X4 + X1.X2.X4 + X1'.X2.X3.X4'F3 = X2'.X4 + X1.X2.X4 + X1'.X2.X3.X4' Logic Gates required: 1 2-input AND 1 3-input AND 1 4-input AND 1 3-input OR Logic Gates required: 1 2-input AND 1 3-input AND 1 4-input AND 1 3-input OR Total Gates and Inputs required: 6 Logic Gates 17 Inputs shared logic gates Multiple-Output Logic Circuits

29. ECE 331 - Digital System Design29 f 3 f 4 x 1 x 4 x 3 x 4 x 1 x 1 x 2 x 2 x 4 x 4 (d) Combined circuit for f 3 f 4 and x 2 Multiple-Output Logic Circuit