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Target Control Electronics Upgrade 08/01/2009 J. Leaver P. Smith.

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1 Target Control Electronics Upgrade 08/01/2009 J. Leaver P. Smith

2 26/06/2015Imperial College 2 Target Control Electronics Limitations Current system contains many discrete units with multiple isolated processors Very stable / reliable, but: –Never designed for use at ISIS, due to ‘expert’ nature of system and lack of PC interface –PIC processors (+ IO usage) at operational limit  virtually impossible to add new features Plan complete redesign: –Integrate currently disparate functional elements –Increase processing power –Improve / expand user interface –Allow flexibility for future modifications Migration to FPGA-based system, using USBDAQ board

3 26/06/2015Imperial College 3 USBDAQ Generic lab tool / DAQ board developed at IC –Purely digital –USB 2.0 interface –Digital power: 1.2V, 2.5V, 3.3V (5V in) –On board oscillators: 40MHz, 100MHz –Xilinx Spartan 3 1M gate 676-pin FPGA –All spare IO tracked to 0.1” IDC headers 138 differential pairs (can be used single ended) 41 single ended 317 total user IO

4 26/06/2015Imperial College 4 USBDAQ USB Mini- B 1.2V Regulator 2.5/3.3V Regulator Cypress SX2 USB Interface Differential / Single Ended User IO Single Ended User IO 1M Gate Spartan 3 FPGA 4Mb PROM

5 26/06/2015Imperial College 5 USBDAQ Advantages Board used in several other HEP experiments –Well tested, fully functional Existing low-level infrastructure firmware / software package –USB interface, communication / configuration framework Traditionally difficult PCB design elements already complete –Power supplies, FPGA routing Basic support available from resident IC experts

6 26/06/2015Imperial College 6 Target Upgrade Implementation All ‘active’ functionality implemented in single FPGA –Enables tightly integrated design No inter-microprocessor communication overheads –Ample processing power for sophisticated Target control feedback algorithms –Easy to change / add functionality in firmware Reduces dependence on ‘hard wired’ electronics Auxiliary electronics placed on 2-3 daughter cards –Low risk Daughter cards should be relatively simple / low cost Can modify / replace ‘peripherals’ without changing core hardware –PCB design effort easily divided between several workers –Sufficient FPGA IO to reserve space for future (unforeseen) daughter card requirements

7 26/06/2015Imperial College 7 USBDAQ Production Initially manufacturing 4 USBDAQs –Sufficient for 3 full Target systems + 1 spare Production status: –PCBs ordered due 14 th January –Parts acquired –PCBs to be assembled in-house at IC 2 boards complete by end of January, remaining 2 by end of February USBDAQ costs: –PCBs:~£562 –Parts:~£415 –Less than £250 per board

8 26/06/2015Imperial College 8 ‘Embryonic’ Design Proposal Initial plan: –Design / manufacture daughter card(s) to mimic current top-level system interface –Recreate existing PIC firmware functionality in VHDL Intended functionality upgrades: –Full configuration / control / status monitoring via PC –Real time Target trajectory control feedback algorithms –LCD display + controls for backup use (i.e. without PC) However, still in very early design phase –Request input from MICE community for further required / desired additions Significant upgrade  estimate ~12 month project

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