1. 1  2004 Morgan Kaufmann Publishers Lectures for 3rd Edition Note: these lectures are often supplemented with other materials and also problems from the text worked out on the blackboard. You’ll want to customize these lectures for your class. The student audience for these lectures have had exposure to logic design and attend a hands-on assembly language programming lab that does not follow a typical lecture format.

2. 2  2004 Morgan Kaufmann Publishers Chapter 1

3. 3  2004 Morgan Kaufmann Publishers Introduction This course is all about how computers work But what do we mean by a computer? –Different types: desktop, servers, embedded devices –Different uses: automobiles, graphics, finance, genomics… –Different manufacturers: Intel, Apple, IBM, Microsoft, Sun… –Different underlying technologies and different costs! Analogy: Consider a course on “automotive vehicles” –Many similarities from vehicle to vehicle (e.g., wheels) –Huge differences from vehicle to vehicle (e.g., gas vs. electric) Best way to learn: –Focus on a specific instance and learn how it works –While learning general principles and historical perspectives

4. 4  2004 Morgan Kaufmann Publishers The number of distinct processors sold between 1998 and 2002

5. 5  2004 Morgan Kaufmann Publishers Sales of microprocessor between 1998 and 2002 “Other” refer to processors that are either application specific or customized architectures

6. 6  2004 Morgan Kaufmann Publishers Why learn this stuff? You want to call yourself a “computer scientist” You want to build software people use (need performance) You need to make a purchasing decision or offer “expert” advice Both Hardware and Software affect performance: –Data Structure/Algorithm determines number of source-level statements –Language/Compiler/Architecture determine machine instructions (Chapter 2 and 3) –Processor/Memory determine how fast instructions are executed (Chapter 5, 6, and 7) Assessing and Understanding Performance in Chapter 4

7. 7  2004 Morgan Kaufmann Publishers View of hardware and software as hierarchical layers System software –Software that provides services that are commonly useful –Including Operating System Compiler

8. 8  2004 Morgan Kaufmann Publishers Abstraction Delving into the depths reveals more information An abstraction omits unneeded detail, helps us cope with complexity What are some of the details that appear in these familiar abstractions?

9. 9  2004 Morgan Kaufmann Publishers What is a computer? Components: –input (mouse, keyboard) –output (display, printer) –memory (disk drives, DRAM, SRAM, CD) –network Our primary focus: the processor (datapath and control) –implemented using millions of transistors –Impossible to understand by looking at each transistor –We need...

10. 10  2004 Morgan Kaufmann Publishers Five classic components of a computer Keyboard, mouse, joystick Instruction decode Control signals ALU, Registers Monitor Primary memory Cache Secondary memory

11. 11  2004 Morgan Kaufmann Publishers Through the Looking Glass CRT (cathode ray tube) –A display, such as a television set, that displays an image using an electron beam scanned across a screen. Pixel –The smallest individual picture element. Screen are composed of hundreds of thousands to millions of pixels.

12. 12  2004 Morgan Kaufmann Publishers How do computers work? Need to understand abstractions such as: –Applications software –Systems software –Assembly Language –Machine Language –Architectural Issues: i.e., Caches, Virtual Memory, Pipelining –Sequential logic, finite state machines –Combinational logic, arithmetic circuits –Boolean logic, 1s and 0s –Transistors used to build logic gates (CMOS) –Semiconductors/Silicon used to build transistors –Properties of atoms, electrons, and quantum dynamics So much to learn!

13. CS152 / Kubiatowicz Lec1.13 8/29/01©UCB Fall 2001 What is “Computer Architecture”? I/O systemInstr. Set Proc. Compiler Operating System Application Digital Design Circuit Design Instruction Set Architecture Firmware °Coordination of many levels of abstraction °Under a rapidly changing set of forces °Design, Measurement, and Evaluation Datapath & Control Layout

14. 14  2004 Morgan Kaufmann Publishers Instruction Set Architecture A very important abstraction –interface between hardware and low-level software –standardizes instructions, machine language bit patterns, etc. –advantage: different implementations of the same architecture –disadvantage: sometimes prevents using new innovations True or False: Binary compatibility is extraordinarily important? Modern instruction set architectures: –IA-32, PowerPC, MIPS, SPARC, ARM, and others

15. 15  2004 Morgan Kaufmann Publishers Historical Perspective ENIAC built in World War II was the first general purpose computer –Used for computing artillery firing tables –80 feet long by 8.5 feet high and several feet wide –Each of the twenty 10 digit registers was 2 feet long –Used 18,000 vacuum tubes –Performed 1900 additions per second –Since then: Moore’s Law: transistor capacity doubles every 18-24 months

16. 16  2004 Morgan Kaufmann Publishers Inside the personal computer

17. 17  2004 Morgan Kaufmann Publishers Close-up of PC motherboard

18. 18  2004 Morgan Kaufmann Publishers Inside the processor chip

19. 19  2004 Morgan Kaufmann Publishers Storage system Memory –Volatile memory (usually used as “primary memory”) Storage, such as DRAM, that only retains data only if it is receiving power (memory inside the computer is volatile) –nonvolatile memory (usually used as “secondary memory”) Retains data even in the absence of a power source and that is used to store programs between runs Magnetic disk –A form of nonvolatile secondary memory composed of rotating platters coated with a magnetic recoding material.

20. CS152 / Kubiatowicz Lec1.20 8/29/01©UCB Fall 2001 Forces on Computer Architecture Computer Architecture Technology Programming Languages Operating Systems History Applications Cleverness

21. 21  2004 Morgan Kaufmann Publishers Technologies YearTechnology used in computersRelative performance/unit cost 1951Vacuum tube1 1965Transistor35 1975Integrated circuit900 1995 Very large scale integrated circuit (VLSI) 2,400,000 2005Ultra large scale integrated circuit6,200,000,000

22. 22  2004 Morgan Kaufmann Publishers Growth of capacity per DRAM chip over time

23. 23  2004 Morgan Kaufmann Publishers The chip manufacturing process

24. 24  2004 Morgan Kaufmann Publishers An 8-inch diameter wafer containing P4 processors

25. CS152 / Kubiatowicz Lec1.25 8/29/01©UCB Fall 2001 Technology °In ~1985 the single-chip processor (32-bit) and the single-board computer emerged => workstations, personal computers, multiprocessors have been riding this wave since °In the 2002+ timeframe, these may well look like mainframes compared single-chip computer (maybe 2 chips) DRAM YearSize 198064 Kb 1983256 Kb 19861 Mb 19894 Mb 199216 Mb 199664 Mb 1999256 Mb 20021 Gb Microprocessor Logic DensityDRAM chip capacity

26. CS152 / Kubiatowicz Lec1.26 8/29/01©UCB Fall 2001 Technology => dramatic change °Processor logic capacity: about 30% per year clock rate: about 20% per year °Memory DRAM capacity: about 60% per year (4x every 3 years) Memory speed: about 10% per year Cost per bit: improves about 25% per year °Disk capacity: about 60% per year Total use of data: 100% per 9 months! °Network Bandwidth Bandwidth increasing more than 100% per year!

27. CS152 / Kubiatowicz Lec1.27 8/29/01©UCB Fall 2001 Performance Trends Microprocessors Minicomputers Mainframes Supercomputers 1995 Year 19901970197519801985 Log of Performance

28. CS152 / Kubiatowicz Lec1.28 8/29/01©UCB Fall 2001 Processor Performance (SPEC) RISC introduction Did RISC win the technology battle and lose the market war? performance now improves ~60% per year (2x every 1.5 years)

29. CS152 / Kubiatowicz Lec1.29 8/29/01©UCB Fall 2001 Applications and Languages °CAD, CAM, CAE,... °Lotus, DOS,... °Multimedia,... °The Web,... °JAVA,... °The Net => ubiquitous computing °???

30. CS152 / Kubiatowicz Lec1.30 8/29/01©UCB Fall 2001 Measurement and Evaluation Architecture is an iterative process -- searching the space of possible designs -- at all levels of computer systems Good Ideas Mediocre Ideas Bad Ideas Cost / Performance Analysis Design Analysis Creativity

31. CS152 / Kubiatowicz Lec1.31 8/29/01©UCB Fall 2001 Why do Computer Architecture? °CHANGE °It’s exciting! °It has never been more exciting! °It impacts every other aspect of electrical engineering and computer science

32. CS152 / Kubiatowicz Lec1.32 8/29/01©UCB Fall 2001 °Primary Personal Computer Hardware Block Diagram Components in the PC shown above: Mother board PC components: CPU, Math Co-processor, SRAM cache, DRAM, Video RAM, BIOS ROM, PCI Bridge Peripherals: Monitor, Keyboard, Mouse, EISA Hard Drive, Floppy Disk, CD ROM, printer, scanner, USB drive Recent intel architectures incorporate a 3-chip chipset, consisting of - CPU - Central Processing Unit Northbridge - Connects CPU with DRAM, S-RAM cache, video RAM and Southbridge °Southbridge - Connects peripherals to the Northbridge chip Source: www.vaughns-1-pagers.com/computer/pc-block-diagram.htm Chipset manufacturers: VIA, SiS

33. CS152 / Kubiatowicz Lec1.33 8/29/01©UCB Fall 2001 Computers in the News: Sony Playstation 2000 °(as reported in Microprocessor Report, Vol 13, No. 5) Emotion Engine: 6.2 GFLOPS, 75 million polygons per second Graphics Synthesizer: 2.4 Billion pixels per second Claim: Toy Story realism brought to games!

34. CS152 / Kubiatowicz Lec1.34 8/29/01©UCB Fall 2001 Microsoft XBOX360 architecture °CPU core 3 cores IBM 64bit PPC 90nm, 3.2GHz Performance : 115 GFLOPS °GPU core ATI R500 (Xeons) GPU 500MHz, 10MB embedded DRAM 48 ALU operations/cycle 500 million triangles/second 16 billion pixels/second at 4x MSAA

35. CS152 / Kubiatowicz Lec1.35 8/29/01©UCB Fall 2001 ATI R500 (XEONS) GPU architecture

36. CS152 / Kubiatowicz Lec1.36 8/29/01©UCB Fall 2001 Sony Play Station 3 – Cell architecture °Cell core 1 64-bit PPE control core 8 SPE arithmetic cores 90nm, 250 million transistors 4.06 GHz ~ 4.6GHz 256 GFLOPS °EIB Bus 78 ~ 197 GBps °PPE °The PPE consists of a POWER Processing Unit (PPU) connected to a 512KB L2 cache °The key design goals of the PPE are to maximize the performance/power ratio as well as the performance/area ratio. The PPU is a dual-issue, in-order processor with dual-thread support °SPE °consisting of a Synergistic Processing Unit (SPU) and a Memory Flow Controller (MFC). °SPU is a compute engine with SIMD support and 256KB of dedicated local storage. The MFC contains a DMA controller with an associated MMU, as well as an Atomic Unit to handle synchronization operations with other SPUs and the PPU http://domino.watson.ibm.com/comm/research.nsf/pages/r.arch.innovation.html

37. CS152 / Kubiatowicz Lec1.37 8/29/01©UCB Fall 2001 PPE architecture For instruction fetch, decode, branch, issue, and completion For all fixed-point instructions and all load/store-type instructions for all vector and floating-point instructions

38. CS152 / Kubiatowicz Lec1.38 8/29/01©UCB Fall 2001 SPE architecture Local memory stores instructions and data

39. 39  2004 Morgan Kaufmann Publishers Fallacies and Pitfalls Fallacy –Computers have been built in the same, old-fashioned way for far too long, and this antiquated model of computation is running out of stream Pitfall –Ignoring the inexorable progress of hardware when planning a new machine