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CSE 246: Computer Arithmetic Algorithms and Hardware Design Instructor: Prof. Chung-Kuan Cheng Winter 2004 Lecture 1.

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Presentation on theme: "CSE 246: Computer Arithmetic Algorithms and Hardware Design Instructor: Prof. Chung-Kuan Cheng Winter 2004 Lecture 1."— Presentation transcript:

1 CSE 246: Computer Arithmetic Algorithms and Hardware Design Instructor: Prof. Chung-Kuan Cheng Winter 2004 Lecture 1

2 CSE 2462 Agenda  Administrative  Motivation  Lecture 1: Numbers

3 CSE 2463 Administrative  Textbook: Digital Arithmetic Milos D. Ercegovac Tomas Lang  In addition: set of papers to read

4 CSE 2464 Administrative  Grading: Homework – 20% Midterm – 35% Project  Report – 25%  Presentation – 20%  Midterm: Feb. 10 th  Homework 1: 1.2, 1.3, 1.16, 1.17, 1.25 Due: 1/20/04

5 CSE 2465 Administrative  Potential project samples: Use FPGA for add/sub Design reconfigurable blocks Design Low power adder, multiplier Invent Low power/reliable number systems

6 CSE 2466 Administrative  There is no class on the following days: January 27 th January 29 th February 5 th  To make up for these lectures, some lectures will be extended The first extended lecture will be January 8 th

7 CSE 2467 Agenda  Administrative  Motivation  Lecture 1: Numbers

8 CSE 2468 Motivation Why do we care about arithmetic algorithms and hardware design?  Classic problems – well defined  Advancements will have a huge impact Solutions will be widely used  New paradigm Interconnect dominated Power driven Reliability centric FPGAs

9 CSE 2469 Motivation  Should a new business focus on building market or new technology?  New technology: a market will be built around new technology

10 CSE 24610 Motivation  What if we had a 10GHz chip that was 2 cm x 2 cm?  It takes 2 clock cycles (time of flight) to get from one end of the chip to the other How would the clock be distributed? What if the electrical input is 1 Volt/100 Watts? How do we get 100 Amps through the chip?

11 CSE 24611 Topics  Numbers Binary numbers, negative numbers, redundant numbers, residual numbers  Addition/Subtraction Prefix adders (zero deficiency)  Multiplication/Division  Floating point operations  Functions: (sqrt),log, exp, CORDIC  Optimization, analysis, fault tolerance

12 CSE 24612 Other Topics  Potential focus on the following topics: Power reduction Interconnect FPGAs

13 CSE 24613 Goals/Background  Why do you want to take this class? What would you like to learn? Fulfill course requirement Hardware Software Work Research Curiosity

14 CSE 24614 Agenda  Administrative  Motivation  Lecture 1: Numbers

15 CSE 24615 Numbers  Special Symbols Symbols used to represent a value Roman Numerals 1 = I 100 = C 5 = V 500 = D 10 = X1000 = M 50 = L For example: 2004 = MMIV

16 CSE 24616 Numbers  Position Symbols The value depends on the position of the number  For example: 125 = 100 + 20 + 5 One 100, Two 10s, and Five 1s Another example: 1 hour, 3 minutes Positional systems includes radixes: 2, -2, 2, 2j (imaginary)

17 CSE 24617 Numbers  Summation of positional numbers Given: Value is: (where y is the base) For example:  Consider 4 -2 1 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 0 1 -2 4 5 2 3   Note that position systems provide a complete range of numbers (e.g. – 2 to 5)

18 CSE 24618 Signed Numbers  Biased numbers  Signed Bit  Complementary representation Positive number: x (mod p) Negative number:(M-x) (mod p) (Note: mod p is added implicitly) One ’ s complement Two ’ s complement Flip each bitFlip each bit + 1 Two ’ s complement can be used for subtraction 0 0 1 0 1 1 0 1 -0 0 0 1 0 1 1 0 1 -2

19 CSE 24619 Signed Numbers  Two ’ s complement subtraction: (M-x+M-y) mod M = M-(x+y)  Two ’ s complement conversion: Positive number: To negative:

20 CSE 24620 Signed Numbers  Two ’ s complement 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 0 1 2 3 -4 -3 -2 Proof as follows: Which leads to: Example:

21 CSE 24621 Next time  Talk about redundant numbers


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