1. Presenting: Itai Avron Supervisor: Chen Koren Final Presentation Spring 2005 Implementation of Artificial Intelligence System on FPGA

2. Project Goals Creating a VHDL design of a Neural Network Comparison Vs. software implementation (Matlab)

3. Background Neural Network is a Learning Machine It is build from Neurons (Perceptrons), which holds the knowledge of the system within their inter-connection strength Every Neuron Implement the Active Function:

4. System Interface Input: - Image (16x16 pixels) - Weights Output: - A number between 0-9 (4 bit vector)

5. System Architecture

6. Net Architecture

7. Controller – Flow Diagram

8. Neuron Architecture

9. Hardware Requirements Neuron : ROM – 2^15*20 bit = 80KB 257 Multipliers (20 bit input) 256 Adders (40-48 bit input) Network : Memory – Used : 17*(256+1)*20 bit = 10.7KB In Reality : 32 Lines => 20.1KB System : Image registers – 20*256 bit = 640B

10. Simulations Neuron:

11. Neural Network

12. Neural Network (Cont.)

13. System

14. System (Cont.)

15. Synthesis Synthesis on 3 different FPGA 1.xc2v1000-5-bg575 -> 67.128MHz 2. xc2v1000-6-fg256 -> 80.540MHz 3. xc2vp20-6-fg676 -> 75.603MHz  Frequency = 80MHz

16. Comparison Matlab : 114 errors out of 1000 pictures Calculation time: 0.5970 sec VHDL : 114 errors out of 1000 pictures Calculation time: 1000*43/80MHz = 0.5373 msec  The hardware is about 1000 times faster!!

17. Improvement Suggestion Change numbers resolution to less than 18 bit (max input bits in Xilinx components) Implement learning is HW