1. Conformance Simulation Relation ( ) Let and be two automata over the same alphabet simulates () if there exists a simulation relation such that Note that simulates implies that but these are not equivalent notions. If may be easier to find a simulation relation than to prove language containment.

2. Language Containment ( ) To show that (i.e. ) we typically show that This requires complementing which may be hard if is non-deterministic (subset construction). So simulation may be easier to check. Equivalence ( ):

3. I1 I2 O2 O1 U1U2 F X most general Topologies

4. I1 O2 U1U2 X F two-way cascade I1 O2 U1 F X one-way cascade We can also switch X and F

5. I1 O1 U1U2 F X rectification I2 O2 U1U2 F X Engineering Change

6. I2 U1=O 1 U2 F X Controller

7. Solving a language equation Solve where and In particular, find the largest solution X (most general solution). Theorem A: Let A and C be languages over alphabets and respectively. For the equation, the most general solution is Theorem B: Let A and C be languages over alphabets and respectively. For the equation, the most general solution is.

8. Proof: We prove Theorem A. Let. Then means that Thus is the largest solution of The proof of Theorem B is similar.

9. Mapping Parallel into Synchronous Suppose F is a FSM on inputs i,v and outputs u,o and S is an FSM on inputs i and outputs o. Transitions are one of the forms (s i/u s’) (s i/o s’) (s v/u s’) or (s v/o s’). For S, its transitions are of the type (q i/o q’). For each, we convert into automata by creating new intermediate states between inputs and outputs. Thus a transition (s i/u s’) becomes two transitions (s i s’’) (s’’ u s’). i/u iu ss’ s’’ s s’ Similarly for the others. For S a transition of the type (q i/o q’) becomes (q i q’’) (q’’ o q’).

10. With these conversions, we can do synchronous composition and get the equivalent expanded result of parallel composition. Thus we need to implement only one type of compositional method – synchronous, and simply have mapping of each machine into its extended machine to compose in parallel. Finally, we can take the solution and map it back into an FSM. ss’ i/o s s’’ s’ i o -u-u -u-u Now for each s’’ we add a self loop labeled by To expand, for each original state, we add a self loop labeled with – u. denoting any symbol in the alphabet u