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Arithmetic CPSC 321 Computer Architecture Andreas Klappenecker.

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Presentation on theme: "Arithmetic CPSC 321 Computer Architecture Andreas Klappenecker."— Presentation transcript:

1 Arithmetic CPSC 321 Computer Architecture Andreas Klappenecker

2 Overview Number representations Overflows Floating point numbers Arithmetic logic units

3 Unsigned Numbers 32 bits are available Range 0..2 32 -1 1101 2 = 2 3 +2 2 +2 0 = 13 10 Upper bound 2 32 –1 = 4 294 967 295

4 Number representations What signed integer number representations do you know?

5 Signed Numbers Sign-magnitude representation MSB represents sign, 31bits for magnitude One’s complement Use 0..2 31 -1 for non-negative range Invert all bits for negative numbers Two’s complement Same as one’s complement except negative numbers are obtained by inverting all bits and adding 1

6 Advantages and Disadvantages  sign-magnitude representation  one’s complement representation  two’s complement representation

7 Signed Numbers (3bits) sign magnitudeone’s complementtwo’s complement 000 2 = 0 001 2 = 1 010 2 = 2 011 2 = 3 100 2 = -0100 2 = -3100 2 = -4 101 2 = -1101 2 = -2101 2 = -3 110 2 = -2110 2 = -1110 2 = -2 111 2 = -3111 2 = -0111 2 = -1

8 Two’s complement The unsigned sum of an n-bit number its negative yields? Example with 3 bits: 011 2 101 2 1000 2 = 2 n => negate(x) = 2 n -x Explain one’s complement

9 0000 0000 0000 0000 0000 0000 0000 0000 two = 0 ten 0000 0000 0000 0000 0000 0000 0000 0001 two = +1 ten 0000 0000 0000 0000 0000 0000 0000 0010 two = +2 ten... 0111 1111 1111 1111 1111 1111 1111 1110 two = +2,147,483,646 ten 0111 1111 1111 1111 1111 1111 1111 1111 two = +2,147,483,647 ten 1000 0000 0000 0000 0000 0000 0000 0000 two = –2,147,483,648 ten 1000 0000 0000 0000 0000 0000 0000 0001 two = –2,147,483,647 ten 1000 0000 0000 0000 0000 0000 0000 0010 two = –2,147,483,646 ten... 1111 1111 1111 1111 1111 1111 1111 1101 two = –3 ten 1111 1111 1111 1111 1111 1111 1111 1110 two = –2 ten 1111 1111 1111 1111 1111 1111 1111 1111 two = –1 ten MIPS 32bit signed numbers

10 Conversions How do you convert an n-bit number into a 2n-bit number? (Assume two’s complement representation)

11 Conversions Suppose that you have 3bit two’s complement number 101 2 = -3 Convert into a 6bit two’s complement number 111101 2 = -3 Replicate most significant bit!

12 Comparisons What can go wrong if you accidentally compare unsigned with signed numbers?

13 Comparisons for [un]signed Register $s0 1111 1111 1111 1111 1111 1111 1111 1111 Register $s1 0000 0000 0000 0000 0000 0000 0000 0001 Compare registers (set less than) slt $t0, $s0, $s1yes, since –1 < 1 sltu $t1, $s0, $s1 no, since 2 32 -1>1

14 Just like in grade school (carry/borrow 1s) 0111 0111 0110 + 0110- 0110- 0101 Two's complement operations easy subtraction using addition of negative numbers 0111 + 1010 Addition & Subtraction

15 Overflow means that the result is too large for a finite computer word for example, adding two n-bit numbers does not yield an n-bit number 0111 + 0001 1000  the term overflow is somewhat misleading Overflow

16 No overflow when adding a positive and a negative number No overflow when signs are the same for subtraction Overflow occurs when the value affects the sign: overflow when adding two positives yields a negative or, adding two negatives gives a positive or, subtract a negative from a positive and get a negative or, subtract a positive from a negative and get a positive Detecting Overflow

17 OperationOperand AOperand BOverflow if result A+B>=0 <0 A+B<0 >=0 A-B>=0<0 A-B<0>=0

18 An exception (interrupt) occurs Control jumps to predefined address for exception Interrupted address is saved for possible resumption Don't always want to detect overflow MIPS instructions: addu, addiu, subu note: addiu still sign-extends! Effects of Overflow

19 What next? More MIPS assembly operations How does an ALU work? Simple digital logic design How can we speed-up addition? What about multiplication?


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