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EENG449/Savvides Lec 1.1 1/11/05 2005s/eeng449b January 11, 2005 Prof. Andreas Savvides Spring 2005 Location ML.

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Presentation on theme: "EENG449/Savvides Lec 1.1 1/11/05 2005s/eeng449b January 11, 2005 Prof. Andreas Savvides Spring 2005 Location ML."— Presentation transcript:

1 EENG449/Savvides Lec 1.1 1/11/05 http://www.eng.yale.edu/enalab/courses/ 2005s/eeng449b January 11, 2005 Prof. Andreas Savvides Spring 2005 Location ML 211 EENG 449b/CPSC 439bG Computer Systems Lecture 1 Introduction

2 EENG449/Savvides Lec 1.2 1/11/05 Outline Why take this class? Trends in Computer Architecture Course Structure Administrative Issues Performance Evaluation Summary

3 EENG449/Savvides Lec 1.3 1/11/05 Why take this class? To design the next great instruction set?...well... –instruction set architecture has largely converged –especially in the desktop / server / laptop space –dictated by powerful market forces Tremendous organizational innovation relative to established ISA abstractions Many New instruction sets or equivalent –embedded space, controllers, specialized devices,... Design, analysis, implementation concepts vital to all aspects of EE & CS –systems, PL, theory, circuit design, VLSI, comm. Equip you with an intellectual toolbox for dealing with a host of systems design challenges

4 EENG449/Savvides Lec 1.4 1/11/05 What is the focus of this class? Cover the basic underlying principles of computer architecture –What’s inside a microprocessor –How memories and storage systems work Develop a broader view of computer systems design, not only based on CPU design, but also –How software and hardware come together in tiny networked devices –Explored with a selection of research papers and class projects

5 EENG449/Savvides Lec 1.5 1/11/05 Example Hot Developments ca. 2002 Manipulating the instruction set abstraction –itanium: translate ISA64 -> micro-op sequences –transmeta: continuous dynamic translation of IA32 –tinsilica: synthesize the ISA from the application –reconfigurable HW Virtualization –vmware: emulate full virtual machine –JIT: compile to abstract virtual machine, dynamically compile to host Parallelism –wide issue, dynamic instruction scheduling, EPIC –multithreading (SMT) –chip multiprocessors Communication –network processors, network interfaces –Sensor nodes and sensor networks Exotic explorations –nanotechnology, quantum computing

6 EENG449/Savvides Lec 1.6 1/11/05 Forces on Computer Architecture Computer Architecture Technology Programming Languages Operating Systems History Applications

7 EENG449/Savvides Lec 1.7 1/11/05 Technology Trends Clock Rate: ~30% per year Transistor Density: ~35% Chip Area: ~15% Transistors per chip: ~55% Total Performance Capability: ~100%

8 EENG449/Savvides Lec 1.8 1/11/05 Moore’s Law Gordon Moore (1965): The number of transistors per integrated circuit doubles every couple of years Intel: This trend will continue at least until the end of this decade… (Obtained from Intel)

9 EENG449/Savvides Lec 1.9 1/11/05 A take on Moore’s Law

10 EENG449/Savvides Lec 1.10 1/11/05 Architecture in the New Millenium Today computer architecture is becoming important in new ways Desktops, notebooks and PDAs are everywhere Micro-controllers are growing the fastest rate –Embedded processors in many new devices »PDAs, remote controls, wireless devices, wireless sensors –A new set of trends for embedded systems »Cost, power and networking are becoming key drivers »Peripherals are becoming equally important to the core »Memories (FLASH and RAM) in the same package next to processor core

11 EENG449/Savvides Lec 1.11 1/11/05 Measurement and Evaluation Architecture is an iterative process -- searching the space of possible designs -- at all levels of computer systems Good Ideas Mediocre Ideas Bad Ideas Cost / Performance Analysis Design Analysis Creativity

12 EENG449/Savvides Lec 1.12 1/11/05 What is “Computer Architecture”? I/O systemInstr. Set Proc. Compiler Operating System Application Digital Design Circuit Design Instruction Set Architecture Firmware Coordination of many levels of abstraction Under a rapidly changing set of forces Design, Measurement, and Evaluation Datapath & Control Layout

13 EENG449/Savvides Lec 1.13 1/11/05 Coping with this class Students with too varied background? –Undergraduate students take this as a first course in architecture (need to have EENG 348a, CPSC 323a, and programming experience in a high-level language) –Graduate students – use this class to transition to grad school and to start your research –Complete the class questionnaire Week 1 Introduction and Performance –Chapter 1 of textbook available online from MKP website http://books.elsevier.com/companions/1558605967 Look under sample chapters section Required Text: Computer Architecture A Quantitative Approach by John Hennesy and David Patterson, 3 rd edition –You can order this online from Amazon, Barnes and Noble, or other online bookstores

14 EENG449/Savvides Lec 1.14 1/11/05 Course Overview Introduction and Performance Evaluation (Chapter 1) Memory Hierarchy (Chapter 5) Instruction Sets (Chapter 2) Instruction Level Parallelism (ILP) (Appendix A & Chapter 3 Exploiting ILP in Software (Chapter 5) Not all the material from the chapters will be covered! I will tell you in class what to focus on In addition to the traditional microprocessor architecture topics this class will also examine other aspects affecting computer architecture such as networks of embedded devices and low power design issues –Handouts will be distributed in class Some of the chapters will be partially covered and supplementary material for other topics will be distributed in class.

15 EENG449/Savvides Lec 1.15 1/11/05 EENG449/CMSC439 Administrivia TA: Dimitrios Lymberopoulos (dimitrios.lymberopoulos@yale.edu) Assignment information, lectures via WWW page: http://www.eng.yale.edu/enalab/courses/2005s/eeng449b http://www.eng.yale.edu/enalab/courses/2005s/eeng449b Lab: CO-40 2 Quizzes: Feb 22 and April 12, 2005 Projects: –Your success largely depends on your own initiative –A list of projects will be discussed in class next week –You are encouraged to pick your own project »Should exercise the concept learned in class –Work in groups of 2 (groups of 1 require my approval)

16 EENG449/Savvides Lec 1.16 1/11/05 Grading 20% Homeworks 40% Examinations (2 Midterms) 30% Project Draft of Conference Quality Paper –pick topic –meet 3 times with faculty/TA to see progress –give oral presentation in class during last week of classes –written report like conference paper –Opportunity to do “research in the small” to help make transition from good student to research colleague 10% Class Participation

17 EENG449/Savvides Lec 1.17 1/11/05 Review of Performance

18 EENG449/Savvides Lec 1.18 1/11/05 Which is faster? Time to run the task (ExTime) –Execution time, response time, latency Tasks per day, hour, week, sec, ns … (Performance) –Throughput (total work done in a given time), bandwidth Plane Boeing 747 Concorde Speed 610 mph 1350 mph DC to Paris 6.5 hours 3 hours Passengers 470 132 Throughput (pmph) 286,700 178,200

19 EENG449/Savvides Lec 1.19 1/11/05 Performance(X) Execution_time(X) n == Performance(Y) Execution_time(Y) Definitions Performance is in units of things per sec –bigger is better If we are primarily concerned with response time –performance(x) = 1 execution_time(x) " X is n times faster than Y" means

20 EENG449/Savvides Lec 1.20 1/11/05 Computer Performance CPU time= Seconds = Instructions x Cycles x Seconds Program Program Instruction Cycle CPU time= Seconds = Instructions x Cycles x Seconds Program Program Instruction Cycle Inst Count CPIClock Rate Program X Compiler X (X) Inst. Set. X X Organization X X Technology X inst count CPI Cycle time

21 EENG449/Savvides Lec 1.21 1/11/05 Cycles Per Instruction (Throughput) CPI = (CPU Time * Clock Rate) / Instruction Count = Cycles / Instruction Count “Average Cycles per Instruction” (e.g 1 GHz)(e.g 5 secs) (time for 1 clock tick) CPU Clock Cycles

22 EENG449/Savvides Lec 1.22 1/11/05 Calculating the Overall CPI Example: A program has 25% FP instructions with average CPI = 4.0 Average CPI of other instructions = 1.33

23 EENG449/Savvides Lec 1.23 1/11/05 Example: Calculating CPI bottom up Typical Mix of instruction types in program Base Machine (Reg / Reg) OpFreqCyclesCPI(i)(% Time) ALU50%1.5(33%) Load20%2.4(27%) Store10%2.2(13%) Branch20%2.4(27%) 1.5

24 EENG449/Savvides Lec 1.24 1/11/05 Amhdal’s Law Defines the speedup that can be gained by an improvement in a particular feature Speedup computed based on 2 factors –Fraction of computation time that can leverage the enhancement –Improvement on the overall task by this enhancement

25 EENG449/Savvides Lec 1.25 1/11/05 Amdahl’s Law (cont.) Fraction of the task that can use the enhancement Improvement offered By the enhancement

26 EENG449/Savvides Lec 1.26 1/11/05 Leveraging Parallelism Parallelism is a recurring theme for improving performance At the machine level – multiple processors, multiple disks At the processor level –Pipelining – overlapping instruction execution During digital design –Set associative caches with multiple banks –ALUs use carry lookahead »Compute 2 outcomes followed by late selection

27 EENG449/Savvides Lec 1.27 1/11/05 Price-Performance Metrics Workstations vs. Embedded Processors In desktops performance is typically measured with a set of benchmark programs (SPEC CINT2000 and SPEC CFP2000) –Influenced by a variety of different factors »Memories, peripherals, operating systems etc. In embedded systems processors are harder to compare –Embedded processors are application specific »Features: on-chip peripherals, on-chip memories –Price and power consumption are also decisive factors »Many electronic devices need to operate on batteries, be small and low cost »Processor performance may be of secondary importance in many applications (e.g your mp3 player does not require Pentium type performance but you want it to be cheap and last long hours)

28 EENG449/Savvides Lec 1.28 1/11/05 Summary Modern Computer Architecture is about managing and optimizing across several levels of abstraction wrt dramatically changing technology and application load Key Abstractions –instruction set architecture –memory –bus Key concepts –HW/SW boundary –Compile Time / Run Time –Pipelining –Caching Performance Iron Triangle relates combined effects –Total Time = Inst. Count x CPI x Cycle Time

29 EENG449/Savvides Lec 1.29 1/11/05 Reading for Week 1 Chapter 1 of textbook –Available at http://books.elsevier.com/companions/1558605967 http://books.elsevier.com/companions/1558605967 For course information and updates visit the class website at http://www.eng.yale.edu/enalab/courses/2005s/eeng44 9b


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