1. The Architecture of Konrad Zuse’s Early Computers Raúl Rojas Freie Universität Berlin

2. Konrad Zuse (1910-1995)

3. Topics Overview Arithmetic in the Z1 and Z3 The processor The datapath Highlights Were the Z1 and Z3 universal?

4. The chronology Z11936-38 Z21939 Z31940-41 S11942 - „Sondermaschine 1“ S21944 - „Sondermaschine 2“ Z41942-45

5. The Z1 and Z3 Z1 (1936-1938) Z3 (1938-1941) - mechanical design - programmable (punched tape) - basic arithmetic operations - completely binary - floating-point machine - built with relays - logically equivalent to the Z1

6. The original Z1 (Berlin 1938)

7. A mechanical computing machine...

8. The Z3 (1941): built out of relays Memory Processor

9. Light and shadow...

10. The punched tape reader

11. The block architecture Binary memory 64 words mantissa FP processor exponent Numeric keyboard Numeric display control unit punched tape

12. Decimal input = + 13542 10 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 1 + _ 0678 -8-7-6 decimal exponent sign decimal mantissa 2 4 5 3 1 + 7 7

13. In the Z1 and Z3 IEEE Standard Floating-Point Coding exponent mantissa +, - exponent mantissa +, - 1 bit 6 bit 14 bit 1 bit 7 bit 24 bit

14. Normalized floating-point and rounding exponent 1 bit 6 bit 14 bit mantissa 0 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 copy to register in processor 1. leading one two extra rounding digits 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1 1 +

15. Numerical exceptions zero (lowest exponent) + infinite (highest exponent) - infinite 0 / 0 0 * infinite infinite - infinite Special coding for : The machine stops at :

16. The instruction set - Arithmetic AdditionLs101 100000 SubtractionLs201 101000 MultiplicationLm01 001000 DivisionLi01 010000 Square rootLw01 011000 mnemonic 8-bit code

17. The instruction set - data handling Load Pr 11--------- Store Ps10--------- Binary to decimal Ld01 111000 Decimal to binary Lu01 110000 mnemonic 8-bit code

18. Structure of the processor Register 1 exponent mantissa Register 2 R1 R2 Adders ( +, - )

19. A simple program (a+b)*c Luread decimal number to Register 1 Luread decimal number to Register 2 Ls1add Ps 10store result in address 10 Luread decimal number to Register 1 Pr 10read from address 10 to Register 2 Lmmultiply Ldshow the decimal result

20. The microsequencers conducting rod: advances one position per cycle step 1 step 2 step 3 step 4 step 5

21. Pipelining next instruction Instruction store Store operations run in “zero” cycles

22. Carry look-ahead Addition was performed in three steps: compute sum (XOR) compute all propagated carries produce final result With relays addition can be performed in constant time (not logarithmic time)

23. Shifting Shifting can be done using a shifting tree (in logarithmic time) With relays shifting can be done in constant time

24. Java simulation of the Z3

25. The mechanical relays

26. bit A bit B control bit C = 0 = 1 = 0 A mechanical relay ( B = A AND C ) = 0

27. bit A bit B control bit C A mechanical relay ( B = A and C ) = 0 = 1

28. bit A bit B control bit C A mechanical relay ( B = A and C ) = 0 = 1

29. A two-bit multiplexer bit A bit B bit C = A

30. A two-bit multiplexer bit A bit B bit C

31. A two-bit multiplexer bit A bit B bit C = B

32. The mechanical memory Zero prepare operation

33. The mechanical memory prepare operation move to “1”

34. The mechanical memory move to “1” store 1

35. The Z4 in Zurich

36. Question: Were the Z1 and Z3 universal? YES

37. A single arithmetical loop is universal we only need 6 instructions: LOAD STORE + - * /

38. Arithmetical operations a = b op c LOAD b LOAD c op STORE a Compiled code

39. Simulating branching section 1 0 0 1 section 2 0 1 0 section 3 0 1 1 “execute section 3 = 011”

40. Transform all operations Compute at the beginning of each section t : t = 1 - [(b 1 - z 1 )(b 2 - z 2 )(b 3 - z 3 )] 2 t is only zero if we are in the desired section

41. Transform operations Transform a = b op c into a = a  t + (b op c) (1 - t) this means: only operations in the desired section modify the memory contents

42. The halting problem But how do we stop the loop? -compute 0/q in each iteration -the machine stops when q=0

43. Summary Z1 36-38 Z2 39 Z3 39-41 Z4 42-45 The logarithmic machine The „logical“ machine Theoretical machines Algebraic machines Special machines S1 42 S2 44

44. The S1 and S2 (1942-44): fixed point Z3‘s Binary memory (5-6 words) Numeric keyboard Numeric display control unit punched tape mantissa FP processor exponent mantissa processor (relays) Program

45. Die Rekonstruktion der Z3

46. Das Pipeline Dr. Frank Darius (FU Berlin) - Schaltungsentwurf Georg Heyne (Fritz-Haber-Institut) - Hardwareentwurf Wolfram Däumel (Fritz-Haber-Institut) - Layout Lothar Schönbein (Fritz-Haber-Institut) - Fertigung Torsten Vetter (Fritz-Haber-Institut) - Mikrokontroller Cüneyt Göktekin (FU Berlin) Programmierung Mit Beiträgen von: Alexander Thurm, Fabian Stehn, Georg Wittenburg (FU Berlin)