1. HW Support for STM Breakout Session Summary Christos Kozyrakis Pervasive Parallelism Laboratory Stanford University http://ppl.stanford.edu/~christos

2. Why Hardware Support Advantages Strong atomicity Performance boost No barriers (HTM), fewer barriers (strong atomicity), cheaper barriers (hybrid schemes) These are very important Practicality of TM deployment Invasiveness of STM deployment in large bodies of existing SW Match performance expectations Match ease of use expectations

3. Position Hardware should support conflict detection All you need to provide strong atomicity Eliminates the biggest performance issues See note on versioning in later slide Warnings HW should provide basic mechanisms, not full policies Switch to SW on a conflict SW uses conflict detection selectively HW mechanism should be virtualizable Works with GC, VM, … Many virtualization mechanisms (signatures, full metadata etc); use one that makes the common case fast, potentially change over time… Open questions Granularity? Interface details? Cost? ROI? … HW & SW expertise needed to co-design interfaces

4. A specific proposal HW should provide: A bounded HTM The works, no SW barriers Best effort, probably optimistic A conflict detection mechanism When bounded HTM fails, switch to STM Use conflict detection address performance, atomicity, … issues in the STM

5. On Data Versioning or Commit Versionig is not a big performance issue Most STMs don’t spend much time there If HW provides conflict detection, STM commit can be fast Use stores instead of CAS Programs do more reads than writes