Presentation is loading. Please wait.

Presentation is loading. Please wait.

100 Placement Assign logic blocks to specific chip locations Seek to minimize routing distance, congestion CLB IOB.

Similar presentations


Presentation on theme: "100 Placement Assign logic blocks to specific chip locations Seek to minimize routing distance, congestion CLB IOB."— Presentation transcript:

1 100 Placement Assign logic blocks to specific chip locations Seek to minimize routing distance, congestion CLB IOB

2 101 Placement Cost Function - Wirelength Most systems use Manhattan routing (North, South, East, West, no diagonals) Wirelength estimate = 1/2*(perimeter of bounding box) = “Semi-perimeter” A1A1 A2A2 B1B1 B2B2 B3B3 C1C1 C3C3 C2C2

3 102 Greedy Placement Create initial placement randomly old_cost = cost(placement); for (iteration = 0; iteration < max_iteration; iteration++) { swap random pair of logic blocks; new_cost = cost(placement); if (old_cost < new_cost) undo_move(); } DA CB

4 103 Greedy placement algorithms (force-directed, recursive bipartitioning) can easily get stuck in local minima Need a method that is less susceptible to local minima Placement Local Minima d3d3 d4d4 a1a1 a2a2 a3a3 a4a4 b1b1 b2b2 c2c2 c1c1 b4b4 b3b3 d2d2 d1d1 c4c4 c3c3 AB DC DA CB d3d3 d4d4 a1a1 a2a2 c2c2 c1c1 b4b4 b3b3 a3a3 a4a4 b1b1 b2b2 d2d2 d1d1 c4c4 c3c3

5 104 Annealing Annealing: Cooling hot metals to form good crystal structures Start at high temperatures - atoms move randomly about Cool at specific cooling schedule - leave enough time for atoms to attract into crystal lattice

6 105 Simulated Annealing Move nodes randomly Initially “high temperature” - allow bad moves to happen Lower temperature, accepting less and less bad moves Slowly “cool” placement to allow good structure to form Possible Placements Cost

7 106 SA Acceptance Criteria & Cooling Schedule Compute delta = cost(old_placement) - cost(new_placement) if (delta>=0) accept else if ( ) accept, else reject /* 0<=random<=1 */ Initially temperature is very high (most bad moves accepted) Temp slowly goes to 0, with multiple moves attempted at each temperature Final runs with temp=0 (always reject bad moves) greedily “quench” the system

8 107 SA Cost Function Simulated Annealing requires a cost function that captures quality of placement Smaller cost means better placement Multiple concerns captured in one metric NAND DFF INVNOR

9 108 Simulated Annealing Algorithm Create initial placement randomly old_cost = cost(placement); for (temp = max_temp; temp >= min_temp; temp = next_temp) { for (iteration = 0; iteration < max_iteration; iteration++) { swap random pair of logic blocks; new_cost = cost(placement); if (old_cost < new_cost) if (random >= Func((old_cost - new_cost)/temperature)) undo_move(); }

10 109 Routing Assign logic blocks to specific chip locations Seek to minimize routing distance, congestion IOB CLB

11 110 Route together all the A’s, and all the B’s, minimizing the amount of metal Dark areas are impassible barriers A A A B B A

12 111 Breadth-first search along “wavefront” Maze Router

13 112 Cost of each location includes minimum distance to destination Maze Routing Acceleration: A*/Detour Numbers

14 113 Greedy Multi-terminal Routing Route until first terminal found. Unmark all nodes. Nodes on previous path marked as 1. Continue routing

15 114 2 Order Independent Routing Can avoid order dependency by iterating: Until good routing found { Route nets independent of congestion Add “penalty” to over-capacity regions } 1 12 3 3 4 4 ABCDE WS RQP ONMLKJI HGF VUT


Download ppt "100 Placement Assign logic blocks to specific chip locations Seek to minimize routing distance, congestion CLB IOB."

Similar presentations


Ads by Google