1. Lecture 16 Spiking neural networks
Soft Computing
Lecture 16
Spiking neural networks

2. Phenomenology of spike generationj
threshold -> Spike i
Spike reception: EPSP,
summation of EPSPs
Threshold Spike emission
(Action potential)
Spike reception: EPSP

3. temporal codes The problem of neural coding:
Time to first spike after input
correlations
Phase with respect to oscillation

4. Rank Order Coding
One possibility takes advantage of the fact that a neuron can be thought of as an analog-delay convertor. It acts somewhat like a capacitance which is progressively charged by an input until it reaches a threshold, at which point it generates an output pulse – the action potential or spike.
Such neurons will naturally fire earliest when the input is strong, and will take progressively longer to fire when the input is weaker. In this way, the time at which a neuron fires (its response latency) can be used to code the intensity of the stimulus.
However, this sort of code requires knowledge of when the stimulation started, information which is not generally available in the case of the biological visual system. There is, however, a way round this. Consider what happens when several neurons are used in parallel. In this case, even without knowing the precise moment at which the stimulus came on, information can be obtained by looking at the order in which the neurones fire
The order of firing of a group of neurons is potentially a very rich source of information about the input pattern

5. SpikeNet Is developed for control systems Features of neuron:
Feedback from output to inputs for updating of weights
At summation of signals take account of frequency of signal
Activation function is threshold function
Award is used for learning of neuron
Inputs is discrete
One-layer network from this neurons is able to execute functions which available only for multi layer recurrent networks

6. The neural network architecture: SEQAINET (SEQence association and Integration NETwork).

7. FPGA – hardware spike neural network for robots

8. FPGA – hardware spike neural network for robots (2)