1. ELEC353 S. al Zahir UBC Sign-Magnitude Representation High order bit is sign: 0 = positive (or zero), 1 = negative Low order bits represent the magnitude: 0 (000 2 ) thru 7 (111 2 ) Number range for n bits = ± (2 n -1) Two representations for 0

2. ELEC353 S. al Zahir UBC Sign-Magnitude Representations Addition and Subtraction of Numbers 4 + 3 7 0100 0011 0111 -4 + (-3) -7 1100 1011 1111 1- Both operands have same sign: Result sign bit is the same as the operands' sign 4 - 3 1 0 100 1 011 0 001 - 4 + 3 1 100 0 011 1 001 2- Operands have different sign: Operation is subtraction. Sign of result depends on sign of number with the larger magnitude R = X-Y if X>Y subtract |Y| from |X|, sign(R) = sign(X). if X<Y subtract |X| from Y|, sign(R) = sign(Y).

3. ELEC353 S. al Zahir UBC Ones Complement Representation Disadvantages of Sign-Magnitude Representation: Cumbersome addition/subtraction Must compare magnitudes to determine sign of result Ones Complement Representation: Definitions N is positive number, then N is its negative 1's complement N = (2 - 1) - N n Example: 1's complement of 7 = -7 in 1's comp. Shortcut method: simply compute bit wise complement 0111 --> 1000 = -1 in 1's comp. 2 = 10000 -1 = 00001 1111 2 = 10000 -7 = 00111 1000 4 4

4. ELEC353 S. al Zahir UBC Ones Complement Representation Subtraction implemented by addition using 1's complement Still two representations of 0! This causes some problems Some complexities in addition

5. ELEC353 S. al Zahir UBC Two Complement Representations Only one representation for 0 One more negative number than positive number Similar to 1's complement except shifted by one position clockwise N* =2’s comp of N N* = 2 n - N

6. ELEC353 S. al Zahir UBC Two Complement Representations N* = 2 - N n Example: Twos complement of 7 2 = 10000 7 = 0111 1001 = repr. of -7 Example: Twos complement of -7 4 2 = 10000 -7 = 1001 0111 = repr. of 7 4 sub Shortcut method: Twos complement = bitwise complement + 1 0111 -> 1000 + 1 -> 1001 (representation of -7) 1001 -> 0110 + 1 -> 0111 (representation of 7)

7. ELEC353 S. al Zahir UBC Number Systems Ones Complement Calculations 4 + 3 7 0100 0011 0111 -4 + (-3) -7 1011 1100 10111 1 1000 4 - 3 1 0100 1100 10000 1 0001 -4 + 3 1011 0011 1110 End around carry Add carry-out of sign-bit to LSB (assuming no overflow) Method: 1- Add two n-bit numbers starting from LSB 2- If there is an end carry (into position n+1), then remove carry and add a 1 to the LSB (end-around carry).

8. ELEC353 S. al Zahir UBC Number Systems Ones Complement Calculations Why does end-around carry work? Its equivalent to subtracting 2 n and adding 1 (i.e. performing -2 n +1) Case 1 (M > N): S = M - N = M + N = M + (2 n - 1 - N) = (M - N) + 2 n - 1 After end-around carry SUM = S -2 n +1= (M - N) + 2 n - 1 - 2 n + 1 = M - N Case 2 (-M-N, where M + N < 2 n-1); -M + (-N) = M + N = (2 n - M - 1) + (2 n - N - 1) = 2 n + [2 n - 1 - (M + N)] - 1 after end around carry: = 2 n - 1 - (M + N) this is the correct form for representing -(M + N) in 1's complement -4 + (-3) -7 1011 1100 10111 1 1000 4 - 3 1 0100 1100 10000 1 0001

9. ELEC353 S. al Zahir UBC Number Systems Twos Complement Calculations 4 + 3 7 0100 0011 0111 -4 + 3 1100 0011 1111 -4 + (-3) -7 1100 1101 11001 4 - 3 1 0100 1101 10001 Overflow condition for 2’s complement: if carry into sign-bit differs from carry out of sign-bit then the results is an overflow Simpler addition scheme makes twos complement the most common choice for integer number systems within digital systems Method (If no overflow): 1- Add two n-bit numbers starting from LSB 2- Discard the carry out of the sign-bit.

10. ELEC353 S. al Zahir UBC Number Systems Twos Complement Calculations Discarding End Carry: is equivalent to subtracting 2 n Case 1 (-M+N, where N > M): S = -M + N = M* + N = (2 n - M) + N = 2 n - (N - M) After discarding end carry SUM = S -2 n = 2 n - (N - M) - 2 n = N - M Case 2 (-M + (-N), where M + N < 2 n-1 ): S = -M + (-N) = M* + N* = (2 n - M) + (2 n - N) = 2 n - (M+N) + 2 n After discarding end carry SUM = S -2 n = 2 n - (M+N) + 2 n - 2 n = 2 n - (M+N) = (M+N)* -4 + (-3) -7 1100 1101 11001 4 - 3 1 0100 1101 10001

11. ELEC353 S. al Zahir UBC Overflow Conditions (2’s Complement) Overflow occurs when the result of adding two positive (or two negative) n-bit numbers requires more than n bits to be expressed correctly. Overflow indications: Adding two positive numbers results in a negative number Adding two negative numbers results in a positive number 5 + 3 = -9 -7 - 2 = +7 0000 0001 0010 0011 1000 0101 0110 0100 1001 1010 1011 1100 1101 0111 1110 1111 +0 +1 +2 +3 +4 +5 +6 +7 -8 -7 -6 -5 -4 -3 -2 0000 0001 0010 0011 1000 0101 0110 0100 1001 1010 1011 1100 1101 0111 1110 1111 +0 +1 +2 +3 +4 +5 +6 +7 -8 -7 -6 -5 -4 -3 -2

12. ELEC353 S. al Zahir UBC Overflow Examples 5 3 -8 0 1 1 1 0 1 0 1 0 0 1 1 1 0 0 0 -7 -2 7 1 0 0 0 1 0 0 1 1 1 0 0 1 0 1 1 1 527527 0 0 0 1 0 1 0 0 1 0 0 1 1 1 -3 -5 -8 1 1 1 1 0 1 1 0 1 1 1 1 0 0 0 Overflow No overflow Simple Check: Overflow occurs when carry into sign-bit does not equal the carry out of the sign-bit.

13. ELEC353 S. al Zahir UBC Logic Circuits for Binary Addition Half Adder Circuit Half-adder Schematic With twos-complement numbers, adders can perform both addition and subtraction.

14. ELEC353 S. al Zahir UBC Logic Circuits for Binary Addition Full Adder Cascaded Multi-bit Adder usually interested in adding more than two bits this motivates the need for the full adder