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EE 4271 VLSI Design1 Logic Synthesis. Starts from RTL description in HDL or Boolean expressions Outputs a standard cell netlist EE 4271 VLSI Design2.

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Presentation on theme: "EE 4271 VLSI Design1 Logic Synthesis. Starts from RTL description in HDL or Boolean expressions Outputs a standard cell netlist EE 4271 VLSI Design2."— Presentation transcript:

1 EE 4271 VLSI Design1 Logic Synthesis

2 Starts from RTL description in HDL or Boolean expressions Outputs a standard cell netlist EE 4271 VLSI Design2

3 Boolean Function f: B m Y n B = {‘0’, ‘1’}, Y = {‘0’, ‘1’, ‘-’} The function is incompletely specified, don’t care ‘-’ For each output, space of B m can be partitioned into on-set: all inputs leading to output ‘1’ off-set: all inputs leading to output ‘0’ dc-set: all inputs leading to output ‘-’ EE 4271 VLSI Design3

4 Points in Input Space Assigning ‘1’ or ‘0’ to each of the m Boolean variables x 1, x 2, …, x m specifies a point in input space B m Example (‘1’, ‘0’, ‘1’) in B 3 x 1 =‘1’ Λ x 2 =‘0’ Λ x 3 =‘1’ x 1 x 2 x 3 EE 4271 VLSI Design4

5 Terminology Literal: a Boolean variable or its complement Minterm: a product of all input variables or their complements – a point in B m Cube: a product of input variables or their complements The fewer number of variables, the bigger space covered EE 4271 VLSI Design5

6 Boolean Function Representation A Boolean function can be specified by a sum of minterms The expression has a minterm for each point in the on-set EE 4271 VLSI Design6

7 Implicant and Cover An implicant is a cube whose points are either in the on-set or the dc-set A prime implicant is an implicant that is not included in any other implicant A set of prime implicants that together cover all points in the on- set (and some or all points of the dc-set) is called a prime cover EE 4271 VLSI Design7

8 Irredundant Cover An prime cover is irredundant when none of its prime implicants can be removed from the cover An irredundant prime cover is minimal when the cover has the minimal number of prime implicants EE 4271 VLSI Design8

9 Goal of Logic Synthesis Find a minimum irredundant prime cover An irredundant prime cover is not necessarily a minimum EE 4271 VLSI Design9

10 Quine-McCluskey Algorithm Calculate all prime implicants of the union of the on- set and dc-set, omitting prime implicants that only cover points of dc-set Finds the minimum cost cover of all minterms in the on-set by the obtained prime implicants EE 4271 VLSI Design10

11 Set Covering Problem Given a universe U={e 1, …, e n }, a collection of subsets {S 1, …, S m } where each subset contains some elements in universe cost w i is associated with each subset S i find a subcollection C (cover) such that C covers the entire universe Famous NP-complete problem On-set  U, a prime implicant  an S EE 4271 VLSI Design11

12 Example of Set Cover EE 4271 VLSI Design12 U={1,2,3,4} S 1 ={1,2}, w=2 S 2 ={1,3,4}, w=3 S 3 ={3}, w=1 S 4 ={2,4}, w=2 S 5 ={2,3}, w=2 S 6 ={1,2,4}, w=3 C={S 3,S 6 } is the optimal solution S 3 is redundant in C={S 1,S 2,S 3 }, and C={S 1,S 2 } is not optimal

13 Greedy Algorithm EE 4271 VLSI Design13 C = empty [the cover] E= empty [record elements which have been covered] While there is uncovered element Find the subset S i which is most cost effective, that is, the S i with smallest w(S i )/|S i -E|. [weight of subset over the elements in the subset but not covered so far] For each e in S i -E, set price(e)=w(S i )/|S i -E| Put all e in S i to E Put S i in the current partial cover C

14 Running Example (Iter 1) EE 4271 VLSI Design14 U={1,2,3,4} S 1 ={1,2}, w=10 S 2 ={1,3,4}, w=9 S 3 ={3}, w=7 S 4 ={2,4}, w=4 S 5 ={2,3}, w=2 Iteration 1, E = empty w(S 1 )/|S 1 -E|=10/2=5 w(S 2 )/|S 2 -E|=9/3=3 w(S 3 )/|S 3 -E|=7/1=7 w(S 4 )/|S 4 -E|=4/2=2 w(S 5 )/|S 5 -E|=2/2=1 Pick S 5 E = {2,3} C = {S 5 }

15 Running Example (Iter 2) EE 4271 VLSI Design15 U={1,2,3,4} S 1 ={1,2}, w=10 S 2 ={1,3,4}, w=9 S 3 ={3}, w=7 S 4 ={2,4}, w=4 S 5 ={2,3}, w=2 Iteration 2, E={2,3}, C = {S 5 } w(S 1 )/|S 1 -E|=10/1=10 w(S 2 )/|S 2 -E|=9/2=4.5 w(S 3 )/|S 3 -E|=7/0=+infty w(S 4 )/|S 4 -E|=4/1=4 Pick S 4 E = {2,3,4} C = {S 5,S 4 }

16 Running Example (Iter 3) EE 4271 VLSI Design16 U={1,2,3,4} S 1 ={1,2}, w=10 S 2 ={1,3,4}, w=9 S 3 ={3}, w=7 S 4 ={2,4}, w=4 S 5 ={2,3}, w=2 Iteration 3, E={2,3,4}, C={S 5,S 4 } w(S 1 )/|S 1 -E|=10/1=10 w(S 2 )/|S 2 -E|=9/1=9 w(S 3 )/|S 3 -E|=7/0=+infty Pick S 2 E = {2,3,4,1} C = {S 5,S 4,S 2 }

17 Approximation Ratio Denote by OPT the weight of the optimal solution Denote by ALG the weight of the solution of our algorithm Our algorithm is an r-approximation to the optimal solution if for all instances, ALG<= rOPT r=1 means that our algorithm computes the optimal solution We would like to minimize r EE 4271 VLSI Design17

18 Proof of Approximation - I EE 4271 VLSI Design18 Order all elements {e 1, …, e n } in which they are covered by the algorithm, e.g., E = {2,3,4,1} Denote by OPT the optimal solution At any iteration, the uncovered (remaining) elements in the universe (i.e., U-E in the beginning of the iteration) can be covered by a cover of weight at most OPT (since OPT covers all elements) There exists one subset S i with w(S i )/|S i -E| OPT/|U- E|, thus we need a cover with weight>OPT to cover all remaining elements

19 Proof of Approximation - II EE 4271 VLSI Design19 Our algorithm picks the S i with smallest w(S i )/|S i -E|, so its w(S i )/|S i -E|<= OPT/|U-E|. When an element e k is covered, |U-E|<=n-(k-1)=n-k+1 price(e k )<=OPT/(n-k+1)  price(e k ) gives the weight of our solution  price(e k )=OPT(1/n+1/(n-1)+…+1)=lnn OPT

20 Tight Bound EE 4271 VLSI Design20 n elements and a collection of m=n+1 subsets U={1,2,…n} S 1 ={1}, w(S 1 )=1/n S 2 ={2}, w(S 2 )=1/(n-1) S 3 ={3}, w(S 3 )=1/(n-2) … S n ={n}, w(S n )=1 S n+1 ={1,2,…,n}, w(S n+1 )= Our solution {S 1,S 2,…,S n }, weight = ln n Optimal solution {S n+1 }, weight =

21 Better solution? There is no (1-  )lnn-approximation for Weighted Set Cover problem unless NP  DTIME(n loglogn ) Uriel Feige, A threshold of ln n for approximating set cover, Journal of the ACM, Vol. 45, No. 4, pp , 1998 There is no better approximation algorithm running in polynomial time for the general weighted set cover problem It is possible to design better (constant) approximation for specific cases Bounded size EE 4271 VLSI Design21

22 Unweighted & Size Bounded - 1 When w(S)=|S| and # elements in any S <= a constant D, the lnn-approximation algorithm works However, we can have better approximation ratio Recall that in each iteration, we pick the subset with minimum |S i |/|S i -E|.There exists one subset S i with |S i |/|S i -E| = |U-E|/OPT We actually pick the subset which covers at least |U- E|/OPT uncovered elements, where |U-E| is # uncovered elements so far (in the beginning of the current iteration) EE 4271 VLSI Design22

23 Unweighted & Size Bounded - 2 Initially we have n uncovered elements After iteration 1, # uncovered elements <= n – n/OPT After iteration 2, # uncovered elements <= (n – n/OPT) – (n – n/OPT)/OPT After iteration k, # uncovered elements <= n(1- 1/OPT) k Solve n(1-1/OPT) k <=x to find the smallest k, i.e., # iterations such that # uncovered elements <= x Since (1-1/OPT) OPT k/OPT =OPT ln(n/x) Each iteration, one subset is picked and the last x elements need at most x subsets EE 4271 VLSI Design23

24 Unweighted & Size Bounded - 3 Our solution has at most OPT ln(n/x) + x subsets Since # elements for any subset is bounded by a constant D. OPT>=n/D, i.e., n/OPT<=D. Set x=n/D, so x<=OPT. OPT ln(n/x) + x<=OPT ln(D)+OPT Our algorithm is a ln(D)+1 approximation which is a constant approximation EE 4271 VLSI Design24

25 Summary Primary implicant Minimum cost irredundant prime cover Set Cover Greedy Algorithm Approximation Ratio EE 4271 VLSI Design25


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