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A toolchain for running NeuroML/LEMS models on Bluehive Simon Moore.

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Presentation on theme: "A toolchain for running NeuroML/LEMS models on Bluehive Simon Moore."— Presentation transcript:

1 A toolchain for running NeuroML/LEMS models on Bluehive Simon Moore

2 Glossary! NeuroML/LEMS – XML based declarative descriptions of neural networks – LEMS – language for modeling event-based systems – NeuroML – library of LEMS components for neuroscience Bluehive – One or more boxes of highly-connected FPGAs FPGA – Field Programmable Gate Array – Allows custom computation and communication


4 Bluehive Communcation Topology

5 Case Study: Custom Communication for Neural Computation Dan won the 2011 UK distinguished Ph.D. thesis in Computer Science

6 BlueVec on Bluehive BlueVec – a domain specific vector processor – supports streamed memory accesses and parallel compute on FPGA – provides an effective software-programmable substrate for neural computation FPL’2013 paper: Managing the FPGA memory wall: custom computing or vector processing?

7 Refining neural descriptions LEMS  LEMS-lite LEMS provides a high-level declarative description of models LEMS-lite provides an intermediate language between LEMS and machine-specific code Transforming LEMS to LEMS-lite involves choosing numerical methods Work by Robert Cannon (Textensor, Edinburgh) with Michael Hull, Steve Marsh and Matt Naylor (Cambridge)

8 Code generation from LEMS-lite Compile LEMS-lite to output: – C-code Single threaded (in beta) Multithreaded (in progress) – Vectorised C BlueVec (in progress) – OpenCL For GPUs (in planning) For FPGAs (in planning)

9 Tadpoles  LEMS-lite  FPGAs Michael Hull hired on eFutures grant as an RA – PhD work on modeling tadpoles Collaboration with Matt Naylor to produce – Fixed point implementation (useful for Bluehive or SpiNNaker) – Vectorised version for BlueVec on Bluehive – NeuroML+LEMS version (in progress) Collaboration with Robert Cannon to transform into a LEMS-lite version

10 Demo – Tadpole simulation on FPGA Video online:

11 Neural simulation scale-up Data for Izhikevich neurons with 1000 synapses per neuron simulating for 1 second of real-time Num. neuronsNum. coresBlueVec on FPGAXeon server (max 32 cores) 64k11.3s1.1s 128k22.2s 256k43.0s2.9s 512k83.1s3.0s 1M163.3s5.6s 2M323.4s10.8s 1M322.0s- 512k321.0s-

12 Conclusions NeuroML+LEMS – Provides a good interface between neuroscientists and computer scientists LEMS-lite – Allows declarative neural models in LEMS to be refined into a more implementation-focused description Compilation from LEMS-lite – Allows efficient machine-specific executable code to be automatically generated Neural computation demands scalable low-latency communication – FPGAs allow us to explore architectural possibilities

13 Future Directions Hypothesis: highly-connected event-driven architectures will provide power-efficient high-performance scientific computation

14 Extra demo: simulation on FPGA of a Nengo LIF model Video online:

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