2 PRAM A very reasonable question: Why do we need a PRAM model? 1PRAM - Parallel Random Access MachineShared-memory multiprocessorunlimited number of processors, eachhas unlimited local memoryknows its IDable to access the sharedmemory in constant timeunlimited shared memoryP123P2...Pi..PnmA very reasonable question: Why do we need a PRAM model?to make it easy to reason about algorithmsto achieve complexity boundsto analyze the maximum parallelism
3 PRAM MODEL1P123P2?.Common Memory..Pi..PnmPRAM n RAM processors connected to a common memory of m cellsASSUMPTION: at each time unit each Pi can read a memory cell, make an internalcomputation and write another memory cell.CONSEQUENCE: any pair of processor Pi Pj can communicate in constant time!Pi writes the message in cell x at time tPi reads the message in cell x at time t+1
4 Summary of assumptions for PRAM Inputs/Outputs are placed in the shared memory (designated address)Memory cell stores an arbitrarily large integerEach instruction takes unit timeInstructions are synchronized across the processorsPRAM Instruction Setaccumulator architecturememory cell R0 accumulates resultsmultiply/divide instructions take only constant operandsprevents generating exponentially large numbers in polynomial time
5 PRAM Complexity Measures for each individual processortime: number of instructions executedspace: number of memory cells accessedPRAM machinetime: time taken by the longest running processorhardware: maximum number of active processors
6 Two Technical Issues for PRAM How processors are activatedHow shared memory is accessed
7 Processor ActivationP0 places the number of processors (p) in the designated shared-memory celleach active Pi, where i < p, starts executingO(1) time to activateall processors halt when P0 haltsActive processors explicitly activate additional processors via FORK instructionstree-like activationO(log p) time to activatep...1i processor will activate a processor 2i and a processor 2i+1
8 PRAM Too many interconnections gives problems with synchronization However it is the best conceptual model for designing efficient parallel algorithmsdue to simplicity and possibility of simulating efficiently PRAM algorithms on more realistic parallel architecturesBasic parallel statementfor all x in X do in parallelinstruction (x)For each x PRAM will assign a processor which will execute instruction(x)
9 Shared-Memory AccessConcurrent (C) means, many processors can do the operation simultaneously in the same memoryExclusive (E) not concurentEREW (Exclusive Read Exclusive Write)CREW (Concurrent Read Exclusive Write)Many processors can read simultaneously the same location, but only one can attempt to write to a given locationERCW (Exclusive Read Concurrent Write)CRCW (Concurrent Read Concurrent Write)Many processors can write/read at/from the same memory location
10 Concurrent Write (CW) What value gets written finally? Priority CW – processors have priority based on which write value is decidedCommon CW – multiple processors can simultaneously write only if values are the sameArbitrary/Random CW – any one of the values are randomly chosen
11 Example CRCW-PRAM Initially table A contains values 0 and 1 output contains value 0The program computes the “Boolean OR” ofA, A, A, A, A
12 Example CREW-PRAMAssume initially table A contains [0,0,0,0,0,1] and we have the parallel program
15 Membership problem p processors PRAM with n numbers (p ≤ n) Does x exist within the n numbers?P0 contains x and finally P0 has to knowAlgorithmstep1: Inform everyone what x isstep2: Every processor checks [n/p] numbers and sets a flagstep3: Check if any of the flags are set to 1
16 THE PRAM IS A THEORETICAL (UNFEASIBLE) MODEL The interconnection network between processors and memory would requirea very large amount of area .The message-routing on the interconnection network would require timeproportional to network size (i. e. the assumption of a constant access timeto the memory is not realistic).WHY THE PRAM IS A REFERENCE MODEL?Algorithm’s designers can forget the communication problems and focus theirattention on the parallel computation only.There exist algorithms simulating any PRAM algorithm on bounded degreenetworks.Statement 1. A PRAM algorithm requiring time T(n), can be simulated in a mesh of tree in time T(n)=log2n/loglogn, that is each step can be simulated with a slow-do of log2n/loglogn.Statement 2. Any problem that can be solved for a p processor PRAM in t steps can be solved ina p’ processor PRAM in t’=O(tp/p’) stepsInstead of design ad hoc algorithms for bounded degree networks, design moregeneral algorithms for the PRAM model and simulate them on a feasible network.
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