Download presentation

Presentation is loading. Please wait.

Published byMark Stanley Modified over 2 years ago

1
Timing Analysis Predicated on a topological ordering. l 1 = 1 level: l 2 = 1 x y x y z z c s g1g1 g4g4 g3g3 g2g2 g5g5 l 3 = 2 l 5 = 2 l 4 = 3

2
z 1010 1010 1010 1010 1010 1212 0202 1212 Timing Analysis Predicated on a topological ordering. 1 0101 x y x y z c s arrival times 1010 (assume a delay bound of 1 time unit for each gate) l 1 = 1 l 2 = 1 g4g4 g3g3 g2g2 g5g5 l 3 = 2 l 5 = 2 l 4 = 3 g1g1 level:

3
Circuit Model Perform static analysis in the “floating-mode”. At the outset: all wires are assumed to have unknown/undefined values ( ). the primary inputs assume definite values in {0, 1}. a “controlling” input full set of “non-controlling” inputs unknown/undefined output

4
Circuit Model During the analysis, only signals driven (directly or indirectly) by the primary inputs are assigned definite values. 1 ORAND Perform static analysis in the “floating-mode”. At the outset: all wires are assumed to have unknown/undefined values ( ). the primary inputs assume definite values in {0, 1}.

5
Circuit Model AND Up-bounded inertial delay model. each gate has delay in [ 0, t d ] Ensures monotone speed-up property.

6
Circuit Model The arrival time at a gate output is determined: either by the earliest controlling input. AND 1313 0202 0606 0303 (assuming a delay bound of 1)

7
Circuit Model The arrival time at a gate output is determined: either by the earliest controlling input; AND 1313 1212 1616 or by the latest non-controlling input. 1717 (assuming a delay bound of 1)

8
Analysis Functional Analysis: determine what is computed. Timing Analysis: determine how long it takes to compute it. level: l 1 = 1 l 2 = 1 l 3 = 2 l 5 = 2 l 4 = 3 a b a b g1g1 g2g2 g3g3 g4g4 g5g5 c c 1010 1010 1010 1010 1010 1212 0202 1212 1 0101 1010

9
Analysis Explicit analysis: ORAND Functional Analysis: determine what is computed. Timing Analysis: determine how long it takes to compute it.

10
ORAND 000 0101 0202 0101 Analysis000 0101 0202 0101 Explicit analysis: Functional Analysis: determine what is computed. Timing Analysis: determine how long it takes to compute it.

11
0202 000 0101 0202 0101 ORAND 0 10100 0101 0303 m inputs explict evaluation intractable combinations; Analysis000 0101 0202 0101 00 1010 0101 0202 0303 Explicit analysis: Functional Analysis: determine what is computed. Timing Analysis: determine how long it takes to compute it.

12
ORAND Analysis 0 0202 10100 0101 0303 Symbolic analysis: binary, multi-terminal decision diagrams. 0 1 0101 0202 ? 1313 Functional Analysis: determine what is computed. Timing Analysis: determine how long it takes to compute it.

Similar presentations

OK

In a not gate, if the input is on(1) the output is off (0) and vice versa.

In a not gate, if the input is on(1) the output is off (0) and vice versa.

© 2018 SlidePlayer.com Inc.

All rights reserved.

Ads by Google

Ppt on panel discussion meaning Ppt on one self i sing by walt whitman Ppt on world book day april Download ppt on harappan civilization Ppt on self awareness quotes Ppt on job evaluation and job rotation Leadership ppt on accountability Ppt on acid-base indicators examples Ppt on polynomials in maths what is the product Download ppt on transportation in human beings higher