Presentation on theme: "DH2T 34 Computer Architecture 1 LO2 Lesson Two CPU and Buses."— Presentation transcript:
DH2T 34 Computer Architecture 1 LO2 Lesson Two CPU and Buses
To begin with we will look at the Central Processing Unit, or “Processor”. This is the diagram of a CPU. It is not based on any particular model, but most will have these components.
The Control Unit. An average, modern Control Unit uses millions of transistors and capacitors. It will also contain a Decoder unit and the System Clock.
The CU needs a “workspace” where it can decode any instructions it receives. This is called the Instruction Register.
Whenever a program is about to be run, the binary code is first loaded into the RAM (Random Access Memory). The CU then “imports” it’s instructions from the RAM. But the CPU needs to know from which address in the RAM - the Memory Address Register points to the right one.
But how does the MAR know where to point? (Sometimes) the Program Counter tells it. The Program Counter also keeps track of what point in the program we have reached.
The data and instructions may only enter or leave the CPU by one “portal” or buffer. This is the Memory Data (Memory Buffer) Register.
When performing calculations or Boolean logic, data is sent to the Arithmetic and Logic Unit. The ALU also consists of capacitors and transistors.
Like the CU, the ALU needs a “workspace” to manipulate values. This is called the Accumulator.
Registers are small temporary storage units of a fixed size. The number and nature of registers will vary between processors. These registers were accessible by the ALU in about a quarter of the time required to access a main memory location and hence speeded up computation considerably.
This register holds the instruction presently being decoded by the CU The CU decodes, controls and co-ordinates everything that happens within the CPU This register holds data currently being manipulated by the ALU This is a buffer area or “transfer zone” for data being transferred between memory and the CPU This register points to the memory location in RAM of the data being fetched or written The ALU does calculations and makes decisions This register keeps track of the point reached in the program These registers are small temporary storage units of a fixed size.
The RAM chips sit apart from the CPU on the motherboard. For the data values to transfer from one place to the other, there must be a physical connection between the two. We call this connection a BUS. There are three main types of bus in any computer system.
The Data Bus The RAM is connected to the CPU by copper circuit wires, which can carry electrical signals. Data values are passed along this circuit, the data bus. The data bus consists of a flat ribbon of several “wires”, usually in multiples of eight. This enables it to carry whole bytes of information at once.
The Address Bus We already saw that the Memory Address Register points to the correct location in RAM. This particular register is connected to the RAM by the address bus. The address bus carries binary signals which are then interpreted as address numbers, preparing the correct cell to send or receive data.
The Control Bus The third main type of bus connects the Control Unit to all other components. It carries timing and control signals so it is called the control bus.
As well as RAM, the CPU must also communicate with “peripherals”. This enables us to add input and output facilities to the system. Examples of peripherals are the sound card, graphics card and keyboard.
Peripherals are small circuit boards that slot into the bus system. They do this by plugging into special slots on the motherboard. They also communicate with the CPU by the address, data and control buses.
Modern peripherals on a PCI card require a data bus 32 bits wide. AGP graphics cards use 32 or 64 bit data busses. Older ISA peripherals use 8 or 16 bits to transfer data. The width of the bus affects how quickly a computer can transfer data.
Activities 1. Briefly outline the steps involved in a CPU writing to a memory location. 2. Briefly outline the steps involved in a CPU reading from an I/O port. 3. Briefly explain the term Access Speed when applied to memory. 4. Briefly explain the tem Cycle Time when applied to memory.
Activities Answers 1. Briefly outline the steps involved in a CPU writing to a memory location. 2. Briefly outline the steps involved in a CPU reading from an I/O port. 1. CPU places required address onto the address register. 2. The high address lines are decoded. 3. The Chip Select signal is generated. 4. Wait for memory access time 5. CPU places data onto data bus 6. CPU generates MEMW 7. Data is clocked into addressed memory location 1. CPU places required address onto the address register 2. CPU activates the I/O access line 3. The high address lines are decoded 4. The Chip Select signal is generated 5. Wait for I/O access time 6. CPU generates IOR signal 7. Peripheral places data onto data bus 8. CPU reads data from data bus into an internal register
Activities Answers This is the time it takes for the memory to produce the data required from the start of the access until the data is valid on the output. This is a measure of how quickly two back-to-back accesses of a memory chip can be made. Cycle time is the sum of the access time and the memory recovery time. 3. Briefly explain the term Access Speed when applied to memory. 4. Briefly explain the tem Cycle Time when applied to memory.
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