Download presentation

Presentation is loading. Please wait.

Published byAngelica Moore Modified over 2 years ago

1
Ans: (b) Moore’s law projects the doubling of transistors every couple of years and has nothing to do with registers. The number of registers will change only if instruction set architecture is changed. Because machine code has only 5 bits to represent each register, so it would require a substantial change (a new ISA) 1.Given the importance of registers, what is the rate of increase in the number of registers in a chip over time? a)Very fast: They increase as fast as Moore’s law b)Very slow: They only increase as the instruction set changes

2
Fields Op-code: operation code Rs, Rt: source registers Rd: destination register SA: shift amount Funct-code: function specifier 2. Define the R-format instruction: a)What are the various fields? b)What is the basic lay-out? c)What does each field represent? d)Are all of the bits used / needed for each field? e)Given an example of an R-format instruction in MIPS assembler and the corresponding machine code Example: add r1, r2, r0 000000 00010 00000 00001 00000 100000

3
Fields Op-code: operation code Rs: source register Rt: destination register Immediate: 2’s complement constant 3. Define the I-format instruction: a)What are the various fields? b)What is the basic lay-out? c)What does each field represent? d)Why this instruction format needed as opposed to the R- format? e)Give an example of an I-format instruction in MIPS assembler and the corresponding machine code Example: addi r1, r2, 1 001000 00010 00001 0000000000000001

4
4. What is the range of addresses for conditional branches in the MIPS ISA?

5
5. Answer the following questions as true or false: a)The beq instruction always modifies the program counter register b)The add instruction does not modify the PC c)The jal instruction always modifies the PC d)The instruction beq r1,r2,1 will advance the PC by one byte if [r1]=[r2] e)The instruction beq r1,r2,1 will advance the PC by one word if [r1]=[r2] Ans: T. PC = PC+4 even if r1 <> r2 F. PC = PC+4 T. Unconditional branch F. PC = PC+4 + 4 x 1

6
6. Find the shortest sequence of core MIPS instruction to determine the absolute value of a two’s complement integer. Please the result into r3. There are several possible answers to this question. However, in general, all involve the following two steps: 1.Convert the number to a positive value if it is negative, which can be done by multiplication, xor, nor, etc… 2.Move the value to r3

7
7. Write out the truth table, the logic equation and draw the gates for the Sum bit of a 1-bit adder Sum bit is 1 if an odd number of the three inputs 1 →XOR the three inputs half adder a b Cin Sum Cout

Similar presentations

OK

CPS3340 COMPUTER ARCHITECTURE Fall Semester, 2013 10/15/2013 Lecture 11: MIPS-Conditional Instructions Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER.

CPS3340 COMPUTER ARCHITECTURE Fall Semester, 2013 10/15/2013 Lecture 11: MIPS-Conditional Instructions Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER.

© 2017 SlidePlayer.com Inc.

All rights reserved.

Ads by Google

Ppt on exponential and logarithmic functions Ppt on product lifecycle management Ppt on world population day 2012 Ppt on diode circuits and rectifiers Ppt on forward rate agreement quotes Ppt on no plastic bags Ppt on 98 notified sections of companies act 2013 Ppt on hydraulic gear pump Ppt on world health organization Ppt on rf remote control robot