Presentation on theme: "High Frequency Test Methods for Laminate Materials (HF) Project HDPUG May 18, 2011."— Presentation transcript:
High Frequency Test Methods for Laminate Materials (HF) Project HDPUG May 18, 2011
Phase I: Electrically test commonly used high frequency (below IPC Df) laminate materials: * Including all commercial “halogen-free” laminate materials, not “new” materials (not in volume production) * Using all viable electrical test methods for speeds above 2 GHz. Phase II: Reliability testing including IST test coupons from common test vehicles made using the “halogen- free” laminate materials. Note: The term “halogen-free” used herein refers to bromine or brominated compounds not being used in the resin formulation. Project Goals
Project Details 1) Determine the lower loss laminate materials to be tested. Ref. Slide #5: Draft list of set of these laminate materials to be tested. 2) Phase I testing to include several baseline non-halogen-free laminate(s). Examples: Isola 408HR and/or IS ) Standardize on available copper foil type with controlled, constant copper roughness and dielectric construction. 4) In a later phase potentially evaluate alternate constructions. 5) Testing a) Loss Tangent(Df)and Er (Dk) at 2 GHz, 10 GHz, up to GHz where possible, all completely dried with 0X or 6X 260 C preconditioning. * Test Methods: SPP(IBM), SET2DIL(Intel), Bereskin Stripline, EBW, Stripline (IPC ), Split Post Dielectric Resonator Cavity (IPC ), Tri-plate Line Resonator (JPCA-TM001), CISCO.
Project Details, Cont. 5) Testing, Cont. b) IST Testing (Phase II) * Preconditioning 6X at 260 C * 500 Cycles, Peak Temp 150 C * Weibull Plot of failures * Crossection checks for delamination
Laminate Materials Draft list high frequency laminate materials includes the following halogen-free laminate materials; Df (0.007 to 2 GHz): * EMC EM-828* EMC EM-285 * EMC EM-370-D* Grace GA-HF-17 * Hitachi 679(HE)* Hitachi 679H * Hitachi 67(G,H)* Hitachi LZ-71G * ITEQ IT-170GRA* ITEQ IT-168G * Panasonic R-1566W* TUC TU-862HF
Project Milestones 1) Generation of standard test board design and construction stackup. 2) Suppliers commit to supply the laminate materials to be tested. 3) Labs/test sites committed for the before and after 6X at 260 C preconditioning. 4) Labs/test sites committed to perform the Loss Tangent(Df)and Er (Dk) at 2 GHz, 10 GHz, and up to GHz where possible. * SPP(IBM)* SET2DIL(Intel) : * Bereskin Stripline(Isola) : * EBW, Stripline (IPC ) : * Split Post Dielectric Resonator Cavity (IPC ) : * Tri-plate Line Resonator (JPCA-TM001) : 5) Phase II labs/test sites committed.
Project Participants Members of this list:
Tentative Schedule 08/01 Test boards shipped to labs for Dk, Df testing 09/0110/01 Dk, Df reports completed and IST testing starts ’10, 09/01 Laminate manufacturers commit to providing test materials 02/01 Laminate materials received at fabricator 04/01 Test board design completed and laminate materials ordered Final reports completed IST coupon testing completed 11/01 10/01 Work on test board design starts 06/