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Techniques of tuning the flatband voltage of metal/high-k gate-stack Name: TANG Gaofei Student ID: 20222159 The Hong Kong University of Science and Technology.

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Presentation on theme: "Techniques of tuning the flatband voltage of metal/high-k gate-stack Name: TANG Gaofei Student ID: 20222159 The Hong Kong University of Science and Technology."— Presentation transcript:

1 Techniques of tuning the flatband voltage of metal/high-k gate-stack Name: TANG Gaofei Student ID: The Hong Kong University of Science and Technology

2 Outline  Motivation  Device Fabrication  A simple metal/high-k stack process flow  Techniques of tuning flatband voltage  Workfunction  High-k dielectric  Fabrication condition  Summary 2

3 3 Miniaturize the MOSFET by scaling coefficient SizeScaling coefficient L1/k ε1 tox1/k NA NDK Xj1/k W VT1/k * To ensure constant electric field [1] S. M. Sze, Kwok K. Ng. Physics of semiconductor devices (2008)

4 4 Why high-k? The thinner oxide will induce more gate leakage! Equivalent Oxide Thickness (EOT) A thinner high-k layer can be equivalent to a thicker SiO2 Gate dielectricAl2O3HfO2La2O3SiO2 Bandgap (eV) Dielectric Constant Other high-k materials: ZrO2, Y2O3, Ta2O5, TiO2, etc [1] Takashi Ando. Ultimate Scaling of High-κ Gate Dielectrics: Higher-κ or Interfacial Layer Scavenging? Materials. P (2012)

5 5  Poly-Si has a relatively higher resistivity  Boron penetration phenomenon  Vth control by changing doping density  Bad interface quality between poly and high-k material Common materials for gate electrodes: TiN, TaN, W, Mo, NiSi, etc. Why not poly but metal?  Poly-Si close to oxide layer may appear depletion

6 6 Source/Drain implantation FOX formation N+ SiNx P-Si (100) Gate dielectricAl2O3HfO2La2O3 Bandgap (eV) Dielectric Constant92027 Crystallization Temp ( ℃ ) < Fabrication of NMOSFET with metal/high-k stacks

7 7 Source/Drain implantation FOX formation High-k film deposition High-k material This step should be in-situ to avoid moisture absorption, because some materials like La2O3 has bad hygroscopic immunity. Fabrication of NMOSFET with metal/high-k stacks

8 8 Source/Drain implantation FOX formation High-k film deposition Gate electrode formation E-beam evaporation Fabrication of NMOSFET with metal/high-k stacks

9 9 Source/Drain implantation FOX formation High-k film deposition Gate electrode formation E-beam evaporation Etching, RTA Fabrication of NMOSFET with metal/high-k stacks

10 10 Source/Drain implantation FOX formation High-k film deposition Gate electrode formation E-beam evaporation Etching, RTA PR Coating Active region lithography Photo Resist Fabrication of NMOSFET with metal/high-k stacks

11 11 Source/Drain implantation FOX formation High-k film deposition Gate electrode formation E-beam evaporation Etching, RTA Source/drain electrode, liftoff PR Coating Active region lithography Fabrication of NMOSFET with metal/high-k stacks

12 12 Flatband voltage analysis Here, Φ m, Φ s, Q ox, and C ox are the effective metal WF, semiconductor WF, fixed charges in a dielectric film, and capacitance of a dielectric film. C ~ V Curve

13 13 Tuning technique 1 EWF control via different gate metal CV characteristics of TmSiO/HfO2 samples employing different gate metals Flatband voltage versus EOT for TmSiO/HfO2 capacitors employing different gate metal [1] E. Dentoni Litta, et al. Effective workfunction control in TmSiO/HfO2 high-k/metal gate stacks. ULIS, p.69 (2014) Flatband voltage shift with gate metal changing.

14 14 Tuning technique 2 Modulating effective workfunction (EWF) of gate electrode by impurity doping Case: Doping for NiSi-gate electrode [1] J. Kedzierski, et al. Threshold voltage control in NiSi-gated MOSFETs through silicidation induced impurity segregation (SIIS). TED. V. 52, N.1, p.39 (2005)

15 15 Tuning technique 3 Tuning crystalline microstructures in metal gate electrode. [1] K. Ohmori, et al. Wide Controllability of Flatband Voltage by Tuning Crystalline Microstructures in Metal Gate Electrodes. IEDM. p. 345 (2007).

16 16 [1] H. C. WEN, et al. Issues associated with p-type band-edge effective work function metal electrodes: Fermi-level pinning and flatband roll-off. VLSI Symp. p. 160 (2007). [2] G. Bersuker, et al. Origin of the Flat-Band Voltage (Vfb) Roll-Off Phenomenon in Metal/High-k Gate stacks. ESSDERC. p. 134 (2008) Tuning technique 4 Changing the equivalent oxide thickness Roll-Off Model 1.R-O increases with higher electrode WF and thicker high-k film. 2.R-O is slightly greater on p-type substrates.

17 17 Tuning technique 5 Double dielectric films (HfO2/La2O3) It has been reported that La2O3 and Sc2O3 produce negative shift in VFB with respect to HfO2 reference Manabu Adachi. A Novel Flat Band Voltage Tuning for Metal/High-k Gate Stack Structure. Tokyo Institute of Technology, Master thesis (2005) Y. Kim, et al. Electrical characteristics of high-k La2O3 thin film deposited by e-beam evaporation method. Electrochemical Society. Volume 22 (2003)

18 18 Tuning technique 6 Mixed High-k Incorporation at HfO2/SiO2 Interface When changing concentration of La2O3 from 0 to 1, the ΔV FB can be 0.48V.

19 19 Tuning technique 6 Mixed High-k Incorporation at HfO2/SiO2 Interface When changing concentration of Sc2O3 from 0 to 1, the ΔV FB can be 0.15V.

20 20 Tuning technique 7 Anneal temperature changing [1] K. Ohmori, et al. Influences of annealing in reducing and oxidizing ambients on flatband voltage properties of HfO2 gate stack structures. Journal of Applied Physics, v. 101 (2007) FGA: Forming gas anneal OGA: Oxidizing gas anneal With a FGA process, the values of V fb are almost constant, regardless of the difference in WF, mainly due to a complete Fermi level pinning. After an additional OGA process, the largest V fb observed in a temperature range of 250–400 degree is 0.34 V, which is smaller than the WF difference of 0.8 eV.

21 21 Summary Techniques of tuning the flatband voltage of metal/high-k gate-stack  Metal modulation What metal? What doped in metal? What metal crystalline?  High-k dielectric modulation Dielectric EOT modulation Multi-layer high-k materials Mixed high-k materials incorporated  Fabrication condition Anneal temperature

22 Thank You!


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