2 Microcontroller-Based System To I/OCPU: Central Processor UnitI/O: Input/OutputMemory: Program and DataBus: Address signals, Control signals, and Data signalsMicrocontrollere.g. M68HC11
3 TerminologyPin – This is a physical point that connects the microcontroller to the outside world.I/O – Input /OutputInput – This is an input pinOutput – This is an output pinBidirectional I/O – This is pin which can be configured as either input or output.Port I/O register= This is a data register that is physically connected to a set of I/O pinsControl register = This a control register used to configure the operation of a data port or some other function on the controller.
4 TerminologyMemory-mapped I/O: Microcontroller configuration in which external I/O is accessed using normal memory access instructions.The M68HC11 uses memory mapped I/O.This is in contrast to other microprocessors (e.g. Intel) which have a separate I/O address space and use special instructions to access it.
8 Another meaning of “buffer” The word buffer is also frequently used in computer engineering to refer to a region of storage (registers or memory) that is used to hold data temporarily while it is being (or waiting to be) sent or received.This usage is contrasted with an electrical buffer (previous slides) which just amplifies and delays a signal.
26 M68HC11 Port Summary PortA PortB PortC PortD PortE 1 bidirectional, 3 input, and 4 output portTimer portPortB8-bit fixed output portUsed for high byte of mem. addr. in expanded modePortC8-bit bidirectional parallel portUsed for low byte of address & for data in expanded modePortD6-bit bidirectional parallel or serial I/O portPortE8-bit digital or analog input portOne of the 4 outputs is bidirectional on the E9
28 Tangent on Operating Modes The HC11 has four operating modes.These are selected by input signals on the MODB and MODA inputs when the chip is reset.(from HC11 Reference Manual, p.47)
29 Default Memory Maps of HC11E9 (From the HC11E series datasheet, p.37)
30 Ports B and C are mode-dependent Reference manual, p. 62
31 Example pin connections in single-chip HC11 systems Very simple configuration.A small amount of external circuitry is still needed, for:Power supply conditioningExternal clockingLow-voltage resetSetting mode bitsNote there is no external ROM/RAM in this mode!But B and C ports are available for doing parallel I/O.(Reference manual, p.117)
32 Demultiplexing address/data in Expanded modes Datasheet, p. 34
34 Connecting External Memory Note in this example, the 8K EPROM Chip is Selected (CS) if A13 & A15 are high.And, A0-A12 are fed to the EPROM.Therefore, what range(s) of addresses does the EPROM chip map to?ReferenceManual,p. 118
35 Port A – Address $1000 An 8-bit, parallel I/O port. Data address $1000 (normally)Multi-FunctionI/O PortTimer PortPACTL – Port A Control Register ($1026)determines port function
36 Port A – I/O Pin Modes Bits 0-2: Input Bits Bits 3-6: Output Bits PA0-PA2Bits 3-6: Output BitsPA3-PA6Bit 7 Bidirectional BitDirection set in PACTLExcept that PA3 is bidirectional in the E9
37 Port A - $1000 Data Bits Notation: PA7 = Bit 7 of Port A 654321BitsNotation:PA7 = Bit 7 of Port APA6 = Bit 6 of Port APA5 = Bit 5 of Port A……………………………….PA0 = Bit 0 of Port AO=OutputI =InputB=Bidirectional
38 Port A Circuit Schematic This one is also bidirectional in the HC11E’s
39 Port A – I/O Port Mode Example: * Bit 7 configured as input (default) PortA EQU $1000* Output a $C to Port AOutdata EQU % ;Sets bits 3,5,6…………* Output data to PortALDAA #OutdataSTAA PortA* Read Data from PortALDAA PortA
40 PACTL: $1026 Port A Control Register This is DDRA3 in the E series7654321BitsRTR0RTR1PEDGEPAMODPAENDDRA7DDRA7 = Data Direction Register A70 = Input Direction (Default)1 = Output DirectionPAEN = Pulse Accumulator System Enable0 = Disable (Default)Port A is set for I/O function1 = EnablePort A is set for Pulse Accumulator function(part of timer system, to be discussed later)
42 68HC11 LED Example We’ll use PA7 for Input, PA6 for output PA7=0 switch open, PA7=1 switch closedPA6=0 LED off, PA6=1 LED onPseudo-code:Configure PortA ;RepeatIF(PA7=0) then ; Switch is openPA6=0 ; Turn LED OFFElsePA6=1 ; Turn LED ONEndIFUntil Forever
43 Program, using BRSET/BSET/BCLR These instructions allow us to manipulate individual bits, but they force us to use indexed addressing to refer to the I/O registersExtended direct mode is not available with these particular instructionsBIT6 EQU % ; Mask for bit 6BIT7 EQU % ; Mask for bit 7IOBASE EQU $ ; Base of I/O config registersPORTA EQU $ ; Offset of PORTA ($1000)PACTL EQU $ ; Offset of PACTL ($1026)start: LDX #IOBASE ; Point X at I/O config registersCLR PACTL,X ; Clear all PACTL control flags.loop: BRSET PORTA,X BIT7 on ; If port A bit 7 is set, turn LED onBCLR PORTA,X BIT6 ; else, turn LED off. (Clear bit 6)BRA endif ; Go to end of if statement.on: BSET PORTA,X BIT6 ; Turn LED on (set bit 6).endif: JMP loop ; Repeat.
45 Port B 8-bit port Data address: $1004 Example: Fixed Direction: OutputData address: $1004Writing to Address $1004 will write to the port.Example:PortB EQU $1004Value EQU $F2...LDAA #ValueSTAA PortBWhen the HC11 is in expanded mode, on boards with no Port Replacement Unit,Port B is reserved for the upper 8 address bits (AD9-AD15)
47 Port C 8-bit bidirectional port Data address: $1003 Multi-Function: In single-chip mode, or with a Port Replacement UnitI/O PortLatched data from Port C is available at address $1005It’s latched when a rising edge occurs on STRA pinHandshaking portIn expanded mode with no Port Replacement Unit,Used for low 8 bits (AD0-AD7) of memory address bus and for memory data bus (D0-D7)PIOC – Parallel I/O Control Register C determines function
48 Port C - $1003 Data Bits O=Output I =Input B=Bidirectional B B B B B B 7654321BitsO=OutputI =InputB=Bidirectional
49 DDRC - $1007 Bits DDCn= Data Direction Bit n DDCn: 0 = Input (Default) 654321BitsDDCn:0 = Input (Default)1 = Output
50 PORTCL - $1005 Latched Data Bits O=Output I =Input B=Bidirectional B B 7654321BitsO=OutputI =InputB=Bidirectional
51 PIOC - $1002 (STAF Bit) Parallel I/O Control Register STAICWOMHNDSOINPLSEGAINVB7654321BitsSTAF = Strobe A Flag0 = Inactive (default)1 = Set at the active edge of STRA pinRead only bit. Used to determine when data have been latched into Port C. Cleared after bit has been set and read.
52 PIOC - $1002 (STAI Bit) Parallel I/O Control Register STAFSTAICWOMHNDSOINPLSEGAINVB7654321BitsSTAI = Strobe A Interrupt Enable0 = No hardware interrupt generated (default)1 = Interrupt requested when STAF=1Enables or disables the interrupt request from being generated when STRA is asserted.
53 PIOC - $1002 Parallel I/O Control Register (CWOM and EGA Bit) STAFSTAICWOMHNDSOINPLSEGAINVB7654321BitsCWOM = Port C Wire-OR Mode0 = Normal Outputs (default)1 = Open Drain OutputsEGA = Active Edge Select for STRA0 = Falling edge (High to Low)1 = Rising edge (Low to High)
54 Port D 6-bit Address $1008 Multi-Function Bidirectional Port Serial I/O PortSerial Communications Interface (SCI)Asynchronous (i.e. no clock signal needed)Serial Peripheral Interface (SPI)Synchronous (i.e. a clock signal needed)
55 Port D - $1008 Data Register Bits X=Not Used B=Bidirectional X X B B B 7654321BitsX=Not UsedB=Bidirectional
56 DDRD - $1009 Bits DDDn= Data Direction Bit n DDDn: 0 = Input (Default) XXDDD5DDD4DDD3DDD2DDD1DDD07654321BitsDDDn:0 = Input (Default)1 = Output
57 SPCR - $1028 SPI Control Register SPIESPEDWOMMSTRCPOLCPOHSPR1SPR07654321BitsSPIE = SPI System Enable0 = Disable (default)1 = EnableThis bit should be 0 to use Port D for parallel I/ODWOM = Port D Wire-OR Mode0 = Normal Outputs (default)1 = Open Drain Outputs
58 SCCR2 - $102D SCI Control Register 2 TIETCIERIEILIETERERWUSBK7654321BitsTE = Transmit Enable0 = Disable (default)1 = EnableThis bit should be 0 to used Port D for parallel I/ORE = Receiver Enable0 = Disable (default)1 = EnableThis bit should be 0 to used Port D for parallel I/O
59 Port E 8-bit Address $100A Multi-Function Digital Input Port Analog Input Port (Built-in A/D)
60 Port E - $100A Data Register 7654321BitsO=OutputI =InputB=Bidirectional
62 ProblemNeed to transfer data to and from Source to 6811
63 Several Approaches Simple Strobed I/O Full Handshaking I/O Let’s look at several examples
64 Simple Strobed I/O Data Bus Single Control line between Source and 6811Data BusControlBus
65 Data source places data on bus, uses strobe to indicate Simple Strobed InputData source places data on bus, uses strobe to indicate“the data is now valid”
66 Simple Strobed Input Timing Diagram This edge indicates that the “data are now valid”Use this edge to “latch” the data into the 6811
67 6811 uses strobe to indicate to the receiver that Simple Strobed Output6811 uses strobe to indicate to the receiver thatData are available
68 Simple Strobed Output Timing Diagram This edge indicates that the data are “ready”
69 Simple Strobed I/O Advantage - Disadvantage Simple Must know timing relationship between data source/rcvr and 6811.Input: How fast can 6811 accept new data.Output: How fast can receiver accept data from 6811
71 Simple Strobed I/O: Using the 6811 PORTC is used for strobed inputRead data from PORTCL ($1005)External pin: STRA is used to latch dataPORTB is used for strobed outputExternal pin: STRB is used as output ready
72 Simple Strobed I/O: Using the 6811 SET HNDS bit (bit 4) in PIOC control register ($1002) to 0SET EGA bit (bit 1) in PIOC control register ($1002) to desired active edge0 = High to Low (falling)1 = Low to High (rising)SET INVB to set active edge of output strobe0 = active low (High to low)1 = active high (low to high) (default)
80 Full Handshaking I/O Protocol Data BusTwo Control LinesData BusControlBus
81 Full Handshaking I/O Disadvantages Advantages More complicated I/O Control timing relationship between 6811 and External Device
82 Input Handshaking Input Handshaking Ext. Device places data on bus Device asserts “strobe” to indicate “data is available.”Ext. Device asserts “strobe” to indicate“acknowledgement” or “I have the data.”
83 Input Handshaking Data STRA STRF STRB InternalFlagSTRBThis edge indicates to the 6811 that “data are available.”This edge indicates to the External Device that “I have the data.”Ext. Device can send the next byte
84 Reading Input Full Handshaking Configure PortC for inputWrite $00 to DDRC ($1007)Configure PortC via PIOC ($1002) forNo interrupts (STAI=0)Active High Inputs (EGA=1)Active High Outputs (INVB=1)Full Handshaking (HNDS=1)Input Handshaking (OIN=0)STRB Level mode select (PLS=0)Config bits = %Read input as in Simple Input example
85 Output Handshaking 6811 asserts STRB that says “data are available.” Ext. Device reads data.Ext. Device asserts “strobe” to indicate thatI have the “data.” Ready for another byte.
86 Output Handshaking Data STRB STRA STRF This edge indicates to the External Device that “data are available.”This edge indicates to the 6811 that “I have the data.” 6811 canSend another data byte
87 Writing Full Handshaking Configure PortC for outputWrite $FF to DDRC ($1007)Configure PortC via PIOC ($1002) forNo interrupts (STAI=0)Active High Inputs (EGA=1)Active High Outputs (INVB=1)Full Handshaking (HNDS=1)Output Handshaking (OIN=1)STRB Level mode select (PLS=0)Config bits = %Read input as in Simple Input example