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1 Electrical Engineering 2 Microelectronics 2 Dr. Peter Ewen (Room G08, SMC; email - pjse) Lecture 4.

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Presentation on theme: "1 Electrical Engineering 2 Microelectronics 2 Dr. Peter Ewen (Room G08, SMC; email - pjse) Lecture 4."— Presentation transcript:

1 1 Electrical Engineering 2 Microelectronics 2 Dr. Peter Ewen (Room G08, SMC; - pjse) Lecture 4

2 ELECTRICAL ENGINEERING 2 Microelectronics 2 Dr. P.J.S. Ewen LECTURES: Mondays Swann 7.20 Fridays JCMB 5327 Fridays JCMB 5327 TUTORIALS: Mondays Eng. CR 4 (Monday Lab Group) Tuesdays Eng. CR 4 Tuesdays Eng. CR 4 (Friday Lab Group) N.B. Tutorials run in weeks 3, 5, 7, 9, 11

3 3 Fig. 20 Si SiSi  +ve charge associated with vacancy  the vacancy is mobile Electric field -ve +ve +ve  the vacancy acts like a mobile +ve charge + - Semiconductor Electron-hole pair

4 4 n i – intrinsic carrier concentration (N.B. n i ≠ n + p) At 300K: n i = 1.5x10 16 m -3 for Si n i = 2.5x10 19 m -3 for Ge INTRINSIC SEMICONDUCTORS Pure semiconductors are termed “intrinsic”: n = p = n i n – free electron concentration; p – hole concentration Si SiSi

5 5 CARRIER LIFETIME -  : <  < s C.B. V.B. GENERATION RECOMBINATION Fig. 21 EgEgEgEg

6 6n-typepentavalentdonoratomsp-typetrivalentacceptoratoms Substitutional impurities – they can be incorporated into the semiconductor lattice without distorting it. Typical doping concentrations: – m -3 EXTRINSIC SEMICONDUCTORS

7 7 Fig. 22 Si As Si Si Si Donoratom Energy ~0.01 eV n-type Si C.B. V.B. Donor levels

8 8 Fig. 22 Si B Si Si Si Acceptoratom Energy ~0.01 eV p-type Si C.B. V.B. Acceptor levels

9 9 Fig. 23: Typical range of conductivities/resistivities for metals insulators and semiconductors. i i i i i

10 10 The effect of increasing temperature on resistance/resistivity. MetalIntrinsicsemiconductorInsulator Extrinsic semiconductor As T  RRRR RRRR RRRR R  or R  or R constant TCR+ve-ve-ve +ve, -ve or ~0 Fig. 24 def Temperature Coefficient of Resistance

11 11 LECTURE 4  Influence of temperature on carrier  Influence of temperature on carrier concentrations in semiconductors concentrations in semiconductors  Majority and minority carriers  The Fermi-Dirac distribution function

12 12 Temperature / K (Free) electron concentration, n / m -3 Fig. 25: Free electron concentration vs. temperature for intrinsic and extrinsic silicon × ×10 21 nininini Intrinsic Si n-type Si doped with N D = m -3 EXTRINSIC REGION IONISATION REGION REGION INTRINSICREGION 0

13 13 Si Si Si Si Si Donoratom Si As Si Si Si Energy required to break a silicon bond is ~1.1ev Intrinsic Si Energy required to detach a donor electron is ~0.01ev n-type Si

14 14  Same considerations apply to p-type Si (p = N A in saturation region)  Extrinsic material effectively becomes intrinsic above a certain transition temperature – bad news for devices! Temperature, T / K (Free) electron concentration, n / m × ×10 21 nininini Hole concentration, p / m -3 Hole concentration, p / m -3 Ge Si GaAs nininini nininini

15 15 8. Maximum working temperature for a 8. Maximum working temperature for a semiconductor device semiconductor device The maximum temperature, T max, at which a device can operate is fixed by the semiconductor material from which it is made. At T max, n i = N D for n-type material and n i = N A for p-type material. If n i = C exp (-E g / 2kT) n i = C exp (-E g / 2kT) where E g is the energy gap, T the temperature in degrees K, C is a constant and k is Boltzmann's constant, determine T max for a GaAs sample doped with donors m -3, given that for GaAs, E g = 1.42 eV and C = 18.1x10 23 m -3.

16 16 8. Maximum working temperature for a semiconductor device For an n-type semiconductor, by definition the (approximate) maximum working temperature, T max, is the temperature at which n i = N D.

17 17 So for a GaAs sample doped with donors m -3 : The 1.6  in the above converts eV to joules.) (The 1.6  in the above converts eV to joules.) But at T = T max, n i = N D

18 18 This calculation ignores the change in E g due to temperature: E g decreases from 1.42 to 1.2eV over this temperature range. However, even if you correct for this, the maximum working temperature for GaAs is still greater than 450 o C, much higher than for Si.

19 19 Majority and Minority Carriers For intrinsic semiconductors: n = p = n i  np = n i 2 For extrinsic semiconductors: n n >> p n for n-type n n >> p n for n-type p p >> n p for p-type p p >> n p for p-type For extrinsic semiconductors it also turns out that: np = n i 2 np = n i 2 n i – the intrinsic carrier concentration n – the free electron concentration p – the hole concentration * Temperature, T / K Carrier concentration / m × ×10 21 nininini * Provided semiconductor is in this temperature range

20 20 So for extrinsic semiconductors: So for extrinsic semiconductors: n n p n = n i 2 for n-type n p p p = n i 2 for p-type Temperature, T / K Carrier concentration / m × ×10 21 nininini * Provided semiconductor is in this temperature range n n ≈ N D for n-type p p ≈ N A for p-type N D – donor concentration N A – acceptor concentration * Thus for n-type: n n ≈ N D ; p n ≈ n i 2 / N D for p-type: p p ≈ N A ; n p ≈ n i 2 / N A for p-type: p p ≈ N A ; n p ≈ n i 2 / N A Electrons in n-type – majority carriers Holes in n-type – minority carriers Holes in n-type – minority carriers Holes in p-type – majority carriers Holes in p-type – majority carriers Electrons in p-type – minority carriers Electrons in p-type – minority carriers

21 21 9. Carrier concentrations (Bogart, 9. Carrier concentrations (Bogart, 4 th Edition, Ex. 2-18, p.41) 4 th Edition, Ex. 2-18, p.41) A silicon wafer is doped with 1.8x10 20 m -3 atoms of As. If n i = 1.6x10 16 m -3 determine the electron and hole concentrations, n and p. (Assume the temperature is in the extrinsic region of operation.) of operation.) Temperature, T / K Electron concentration / m -3 4× ×10 20 nininini * Provided semiconductor is in this temperature range 2×10 20

22 22 9. Carrier concentrations Arsenic is an n-type dopant hence:

23 23 Which of the following statements is true: Holes in an n-type semiconductor are… A)Majority carriers that are thermally produced B)Minority carriers that are produced by doping C)Minority carriers that are thermally produced D)Majority carriers that are produced by doping

24 24 Energy C.B. V.B. Donor levels EgEgEgEg Statisticalprocesses E N(E) Total number of electrons at energy E Probability that a state at energy E is occupied Total number of states at energy E The Fermi-Dirac Distribution Function F(E) x n(E) =

25 25 F(E) is the Fermi-Dirac Distribution Function E F – the Fermi Level  A state at the Fermi level, E F, has a chance of being occupied

26 26 Fig. 26 Energy, E C.B. V.B. E ECECECEC EFEFEFEF EVEVEVEV ½E G 0 ½ 1 F(E) F(E) for an INTRINSIC semiconductor THE FERMI-DIRAC DISTRIBUTION

27 27 Fig. 27 Energy, E C.B. V.B. E ECECECEC EFEFEFEF EVEVEVEV 0 ½ 1 F(E) F(E) for an n-type semiconductor THE FERMI-DIRAC DISTRIBUTION donorlevels For n-type semiconductors the Fermi level lies closer to the conduction band edge, E c

28 28 Fig. 28 Energy, E C.B. V.B. E ECECECEC EFEFEFEF EVEVEVEV 0 ½ 1 F(E) F(E) for a p-type semiconductor THE FERMI-DIRAC DISTRIBUTION acceptorlevels For p-type semiconductors the Fermi level lies closer to the valence band edge, E v

29 29 Fig. 29 Energy C.B. V.B. Donor levels EFEFEFEF C.B. V.B. C.B. V.B. EFEFEFEF EFEFEFEF Metal Degenerate n-type Degenerate p-type Degenerate Semiconductors Acceptor levels EGEGEGEG EGEGEGEG

30 30 For a semiconductor sample at 0 K, what is the probability that a state at the top of the valence band is occupied by an electron? A. 0 B. 1 C. ½ D. Between 1 and ½ D. Between 1 and ½

31 31 The Fermi level, E F, for a silicon sample lies 0.8eV above the valence band edge. If the energy gap for silicon is 1.1eV, is this sample A. p-type B. n-type C. intrinsic

32 32 SUMMARY INFLUENCE OF TEMPERATURE ON CARRIER CONCENTRATIONS For intrinsic semiconductors the carrier concentrations increase steadily as T increases. In Si, n i is small below 400K but increases rapidly above this temperature.

33 33  For extrinsic semiconductors the concentration vs. T plot has three regions: 1. Ionisation region – the impurities are being ionised 2. Extrinsic region – all the impurities are ionised; few electron hole pairs 3. Intrinsic region – electron-hole pairs produced in large numbers – material effectively becomes intrinsic  There is a transition temperature below which devices must operate, otherwise pn junctions will be lost.  There is a transition temperature below which devices must operate, otherwise pn junctions will be lost. 33

34 34 MAJORITY AND MINORITY CARRIERS MAJORITY AND MINORITY CARRIERS  Majority carriers - electrons in n-type and holes in p-type  Minority carriers - electrons in p-type and holes in n-type  np = n i 2  np = n i 2  In n-type: n n ≈ N D ; p n ≈ n i 2 / N D  In p-type: p p ≈ N A ; n p ≈ n i 2 / N A

35 35 THE FERMI-DIRAC DISTRIBUTION FUNCTION THE FERMI-DIRAC DISTRIBUTION FUNCTION  This is a statistical function giving the probability that a state at energy E is occupied by an electron  This is a statistical function giving the probability that a state at energy E is occupied by an electron  E F is the FERMI LEVEL - the energy at which a state has a chance of occupancy.

36 36  The Fermi Level is approximately in the middle of the gap for an intrinsic semiconductor.  The position of the Fermi Level is a measure of how n-type or p-type the material is.  A degenerate semiconductor is one which is very heavily doped.


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