3 +ve charge associated with vacancy the vacancy is mobile SiSiSi-ve+veFig. 20Electric field +ve charge associated with vacancy the vacancy is mobile the vacancy acts like a mobile +ve charge+-SemiconductorElectron-hole pair
4 INTRINSIC SEMICONDUCTORS Pure semiconductors are termed “intrinsic”:SiSiSin = p = nin – free electron concentration; p – hole concentrationni – intrinsic carrier concentration(N.B. ni ≠ n + p)At 300K: ni = 1.5x1016 m-3 for Sini = 2.5x1019 m-3 for Ge
5 C.B. Fig. 21 Eg GENERATION RECOMBINATION V.B. CARRIER LIFETIME - : 10-9 < < 10-6 s
6 EXTRINSIC SEMICONDUCTORS n-typepentavalentdonoratomsp-typetrivalentacceptorSubstitutional impurities – they can be incorporated into the semiconductor lattice without distorting it.Typical doping concentrations:1020 – 1026 m-3EXTRINSIC SEMICONDUCTORS
7 C.B. Fig. 22 Energy Si V.B. Si As Si n-type Si Donor atom Si Donor levelsEnergy~0.01 eVSiV.B.SiAsSin-type SiDonoratomSi
8 C.B. Fig. 22 Energy Si V.B. Si B Si p-type Si Acceptor atom Si ~0.01 eVSiAcceptor levelsV.B.SiBSip-type SiAcceptoratomSi
9 Fig. 23: Typical range of conductivities/resistivities for metals insulators and semiconductors.
10 Fig. 24 Temperature Coefficient of Resistance The effect of increasing temperature on resistance/resistivity.MetalIntrinsicsemiconductorInsulatorExtrinsic semiconductorAs TRRR or R or R constantTCR+ve-ve+ve, -ve or ~0Temperature Coefficient of Resistancedef
11 LECTURE 4 Influence of temperature on carrierconcentrations in semiconductorsMajority and minority carriersThe Fermi-Dirac distribution function
12 ni Fig. 25: Free electron concentration vs. temperature for intrinsic and extrinsic silicon3×1021Intrinsic Sin-type Si doped with ND = 1021 m-3INTRINSICREGION2×1021(Free) electron concentration, n / m-3EXTRINSIC REGION1021niIONISATIONREGIONTemperature / K
13 Energy required to break Energy required to detach Intrinsic SiEnergy required to breaka silicon bond is ~1.1evSin-type SiDonoratomSiAsSiSiSiSiEnergy required to detacha donor electron is ~0.01ev
14 Hole concentration, p / m-3 (Free) electron concentration, n / m-3 3×1021Same considerations apply to p-type Si (p = NA in saturation region)2×1021Extrinsic material effectively becomes intrinsic above a certain transition temperature – bad news for devices!Hole concentration, p / m-3(Free) electron concentration, n / m-31021nininiGe SiGaAsTemperature, T / K
15 8. Maximum working temperature for a semiconductor deviceThe maximum temperature, Tmax, at which a device can operate is fixed by the semiconductor material from which it is made. At Tmax, ni = ND for n-type material and ni = NA for p-type material.Ifni = C exp (-Eg / 2kT)where Eg is the energy gap, T the temperature in degrees K, C is a constant and k is Boltzmann's constant, determine Tmax for a GaAs sample doped with 1020 donors m-3, given that for GaAs,Eg = 1.42 eV and C = 18.1x1023 m-3.
16 8. Maximum working temperature for a semiconductor device For an n-type semiconductor, by definition the (approximate) maximum working temperature, Tmax, is the temperature at which ni = ND.
17 But at T = Tmax, ni = NDSo for a GaAs sample doped with 1020 donors m-3:(The 1.610-19 in the above converts eV to joules.)
18 This calculation ignores the change in Eg due to temperature: Eg decreases from 1.42 to 1.2eV over this temperature range. However, even if you correct for this, the maximum working temperature for GaAs is still greater than 450oC, much higher than for Si.
19 *Provided semiconductor is in this temperature range * Majority and Minority CarriersFor intrinsic semiconductors:n = p = ni np = ni2For extrinsic semiconductors:nn >> pn for n-typepp >> np for p-typeFor extrinsic semiconductorsit also turns out that:np = ni2n – the free electron concentrationni – the intrinsic carrier concentrationp – the hole concentrationTemperature, T / KCarrier concentration / m-310212×10213×1021ni*Provided semiconductor is in this temperature range*
20 *Provided semiconductor is in this temperature range * So for extrinsic semiconductors:nnpn = ni2 for n-typenppp = ni2 for p-typeTemperature, T / KCarrier concentration / m-310212×10213×1021ni*Provided semiconductor is in this temperature rangenn ≈ ND for n-typepp ≈ NA for p-typeND – donor concentrationNA – acceptor concentration*Thus for n-type: nn ≈ ND ; pn ≈ ni2 / NDfor p-type: pp ≈ NA ; np ≈ ni2 / NAElectrons in n-type – majority carriersHoles in n-type – minority carriersHoles in p-type – majority carriersElectrons in p-type – minority carriers
21 *Provided semiconductor is in this temperature range 9. Carrier concentrations (Bogart,4th Edition, Ex. 2-18, p.41)A silicon wafer is doped with 1.8x1020m-3 atoms of As. If ni = 1.6x1016m-3 determine the electron and hole concentrations, n and p.(Assume thetemperature is in theextrinsic regionof operation.)6×1020*Provided semiconductor is in this temperature range4×1020Electron concentration / m-32×1020niTemperature, T / K
22 9. Carrier concentrations Arsenic is an n-typedopant hence:
23 Which of the following statements is true: Holes in an n-type semiconductor are…Majority carriers that are thermally producedMinority carriers that are produced by dopingMinority carriers that are thermally producedMajority carriers that are produced by doping
24 The Fermi-Dirac Distribution Function C.B.Donor levelsEnergyStatisticalprocessesEgV.B.n(E) =F(E) xN(E)Total number ofelectrons at energy ETotal number ofstates at energy EProbability that a state at energy E is occupied
25 F(E) is the Fermi-Dirac Distribution Function EF – the Fermi Level A state at the Fermi level, EF, has a chance of being occupied
26 F(E) for an INTRINSIC semiconductor THE FERMI-DIRAC DISTRIBUTION Fig. 26F(E) for an INTRINSIC semiconductorEC.B.EC½EGEFEnergy, E½EGEVV.B.½ F(E)THE FERMI-DIRAC DISTRIBUTION
27 F(E) for an n-type semiconductor THE FERMI-DIRAC DISTRIBUTION Fig. 27F(E) for an n-type semiconductorEC.B.ECEnergy, EdonorlevelsEFEVV.B.For n-type semiconductors the Fermi level lies closer to the conduction band edge, Ec½ F(E)THE FERMI-DIRAC DISTRIBUTION
28 F(E) for a p-type semiconductor THE FERMI-DIRAC DISTRIBUTION Fig. 28F(E) for a p-type semiconductorEC.B.ECacceptorlevelsEnergy, EEFEVV.B.For p-type semiconductors the Fermi level lies closer to the valence band edge, Ev½ F(E)THE FERMI-DIRAC DISTRIBUTION
30 For a semiconductor sample at 0 K, what is the probability that a state at the top of the valence band is occupied by anelectron?A. 0B. 1C. ½D. Between 1 and ½
31 The Fermi level, EF, for a silicon sample lies 0.8eV above the valence band edge. If the energy gap for silicon is 1.1eV, isthis sampleA. p-typeB. n-typeC. intrinsic
32 INFLUENCE OF TEMPERATURE ON CARRIER CONCENTRATIONS SUMMARYINFLUENCE OF TEMPERATURE ON CARRIER CONCENTRATIONSFor intrinsic semiconductors the carrier concentrations increase steadily as T increases. In Si, ni is small below 400K but increases rapidly above this temperature.
33 1. Ionisation region – the impurities are being ionised For extrinsic semiconductors the concentration vs. T plot has three regions:1. Ionisation region – the impurities are being ionised2. Extrinsic region – all the impurities are ionised; few electron hole pairs3. Intrinsic region – electron-hole pairs produced in large numbers – material effectively becomes intrinsicThere is a transition temperature below which devices must operate, otherwise pn junctions will be lost.33
34 MAJORITY AND MINORITY CARRIERS Majority carriers - electrons in n-type and holes in p-typeMinority carriers - electrons in p-type and holes in n-type np = ni2 In n-type: nn ≈ ND ; pn ≈ ni2 / ND In p-type: pp ≈ NA ; np ≈ ni2 / NA
35 THE FERMI-DIRAC DISTRIBUTION FUNCTION This is a statistical function giving the probability that a state at energy E is occupied by an electronEF is the FERMI LEVEL - the energy at which a state has a chance of occupancy.
36 The Fermi Level is approximately in the middle of the gap for an intrinsic semiconductor. The position of the Fermi Level is a measure of how n-type or p-type the material is.A degenerate semiconductor is one which is very heavily doped.