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**(Room G08, SMC; email - pjse)**

Electrical Engineering 2 Lecture 4 Microelectronics 2 Dr. Peter Ewen (Room G08, SMC; - pjse)

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**ELECTRICAL ENGINEERING 2 Microelectronics 2 Dr. P.J.S. Ewen**

LECTURES: Mondays Swann 7.20 Fridays JCMB 5327 TUTORIALS: Mondays Eng. CR 4 (Monday Lab Group) Tuesdays Eng. CR 4 (Friday Lab Group) N.B. Tutorials run in weeks 3, 5, 7, 9, 11

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** +ve charge associated with vacancy the vacancy is mobile **

Si Si Si -ve +ve Fig. 20 Electric field +ve charge associated with vacancy the vacancy is mobile the vacancy acts like a mobile +ve charge + - Semiconductor Electron-hole pair

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**INTRINSIC SEMICONDUCTORS**

Pure semiconductors are termed “intrinsic”: Si Si Si n = p = ni n – free electron concentration; p – hole concentration ni – intrinsic carrier concentration (N.B. ni ≠ n + p) At 300K: ni = 1.5x1016 m-3 for Si ni = 2.5x1019 m-3 for Ge

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**C.B. Fig. 21 Eg GENERATION RECOMBINATION V.B.**

CARRIER LIFETIME - : 10-9 < < 10-6 s

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**EXTRINSIC SEMICONDUCTORS**

n-type pentavalent donor atoms p-type trivalent acceptor Substitutional impurities – they can be incorporated into the semiconductor lattice without distorting it. Typical doping concentrations: 1020 – 1026 m-3 EXTRINSIC SEMICONDUCTORS

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**C.B. Fig. 22 Energy Si V.B. Si As Si n-type Si Donor atom Si**

Donor levels Energy ~0.01 eV Si V.B. Si As Si n-type Si Donor atom Si

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**C.B. Fig. 22 Energy Si V.B. Si B Si p-type Si Acceptor atom Si**

~0.01 eV Si Acceptor levels V.B. Si B Si p-type Si Acceptor atom Si

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**Fig. 23: Typical range of conductivities/resistivities **

for metals insulators and semiconductors.

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**Fig. 24 Temperature Coefficient of Resistance**

The effect of increasing temperature on resistance/resistivity. Metal Intrinsic semiconductor Insulator Extrinsic semiconductor As T R R R or R or R constant TCR +ve -ve +ve, -ve or ~0 Temperature Coefficient of Resistance def

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LECTURE 4 Influence of temperature on carrier concentrations in semiconductors Majority and minority carriers The Fermi-Dirac distribution function

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**ni Fig. 25: Free electron concentration vs. temperature for**

intrinsic and extrinsic silicon 3×1021 Intrinsic Si n-type Si doped with ND = 1021 m-3 INTRINSIC REGION 2×1021 (Free) electron concentration, n / m-3 EXTRINSIC REGION 1021 ni IONISATION REGION Temperature / K

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**Energy required to break Energy required to detach**

Intrinsic Si Energy required to break a silicon bond is ~1.1ev Si n-type Si Donor atom Si As Si Si Si Si Energy required to detach a donor electron is ~0.01ev

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**Hole concentration, p / m-3 (Free) electron concentration, n / m-3**

3×1021 Same considerations apply to p-type Si (p = NA in saturation region) 2×1021 Extrinsic material effectively becomes intrinsic above a certain transition temperature – bad news for devices! Hole concentration, p / m-3 (Free) electron concentration, n / m-3 1021 ni ni ni Ge Si GaAs Temperature, T / K

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**8. Maximum working temperature for a**

semiconductor device The maximum temperature, Tmax, at which a device can operate is fixed by the semiconductor material from which it is made. At Tmax, ni = ND for n-type material and ni = NA for p-type material. If ni = C exp (-Eg / 2kT) where Eg is the energy gap, T the temperature in degrees K, C is a constant and k is Boltzmann's constant, determine Tmax for a GaAs sample doped with 1020 donors m-3, given that for GaAs, Eg = 1.42 eV and C = 18.1x1023 m-3.

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**8. Maximum working temperature for a semiconductor device**

For an n-type semiconductor, by definition the (approximate) maximum working temperature, Tmax, is the temperature at which ni = ND.

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But at T = Tmax, ni = ND So for a GaAs sample doped with 1020 donors m-3: (The 1.610-19 in the above converts eV to joules.)

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**This calculation ignores the change in Eg due to temperature:**

Eg decreases from 1.42 to 1.2eV over this temperature range. However, even if you correct for this, the maximum working temperature for GaAs is still greater than 450oC, much higher than for Si.

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***Provided semiconductor is in this temperature range ***

Majority and Minority Carriers For intrinsic semiconductors: n = p = ni np = ni2 For extrinsic semiconductors: nn >> pn for n-type pp >> np for p-type For extrinsic semiconductors it also turns out that: np = ni2 n – the free electron concentration ni – the intrinsic carrier concentration p – the hole concentration Temperature, T / K Carrier concentration / m-3 1021 2×1021 3×1021 ni *Provided semiconductor is in this temperature range *

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***Provided semiconductor is in this temperature range ***

So for extrinsic semiconductors: nnpn = ni2 for n-type nppp = ni2 for p-type Temperature, T / K Carrier concentration / m-3 1021 2×1021 3×1021 ni *Provided semiconductor is in this temperature range nn ≈ ND for n-type pp ≈ NA for p-type ND – donor concentration NA – acceptor concentration * Thus for n-type: nn ≈ ND ; pn ≈ ni2 / ND for p-type: pp ≈ NA ; np ≈ ni2 / NA Electrons in n-type – majority carriers Holes in n-type – minority carriers Holes in p-type – majority carriers Electrons in p-type – minority carriers

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***Provided semiconductor is in this temperature range**

9. Carrier concentrations (Bogart, 4th Edition, Ex. 2-18, p.41) A silicon wafer is doped with 1.8x1020m-3 atoms of As. If ni = 1.6x1016m-3 determine the electron and hole concentrations, n and p. (Assume the temperature is in the extrinsic region of operation.) 6×1020 *Provided semiconductor is in this temperature range 4×1020 Electron concentration / m-3 2×1020 ni Temperature, T / K

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**9. Carrier concentrations**

Arsenic is an n-type dopant hence:

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**Which of the following statements is true:**

Holes in an n-type semiconductor are… Majority carriers that are thermally produced Minority carriers that are produced by doping Minority carriers that are thermally produced Majority carriers that are produced by doping

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**The Fermi-Dirac Distribution Function**

C.B. Donor levels Energy Statistical processes Eg V.B. n(E) = F(E) x N(E) Total number of electrons at energy E Total number of states at energy E Probability that a state at energy E is occupied

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**F(E) is the Fermi-Dirac Distribution Function**

EF – the Fermi Level A state at the Fermi level, EF, has a chance of being occupied

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**F(E) for an INTRINSIC semiconductor THE FERMI-DIRAC DISTRIBUTION**

Fig. 26 F(E) for an INTRINSIC semiconductor E C.B. EC ½EG EF Energy, E ½EG EV V.B. ½ F(E) THE FERMI-DIRAC DISTRIBUTION

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**F(E) for an n-type semiconductor THE FERMI-DIRAC DISTRIBUTION**

Fig. 27 F(E) for an n-type semiconductor E C.B. EC Energy, E donor levels EF EV V.B. For n-type semiconductors the Fermi level lies closer to the conduction band edge, Ec ½ F(E) THE FERMI-DIRAC DISTRIBUTION

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**F(E) for a p-type semiconductor THE FERMI-DIRAC DISTRIBUTION**

Fig. 28 F(E) for a p-type semiconductor E C.B. EC acceptor levels Energy, E EF EV V.B. For p-type semiconductors the Fermi level lies closer to the valence band edge, Ev ½ F(E) THE FERMI-DIRAC DISTRIBUTION

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**Degenerate Semiconductors**

Fig. 29 Degenerate Semiconductors C.B. C.B. EF Donor levels Energy EG EG Acceptor levels EF V.B. V.B. Degenerate n-type Degenerate p-type C.B. EF V.B. Metal

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**For a semiconductor sample at 0 K, what is the probability**

that a state at the top of the valence band is occupied by an electron? A. 0 B. 1 C. ½ D. Between 1 and ½

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**The Fermi level, EF, for a silicon sample lies 0.8eV above the**

valence band edge. If the energy gap for silicon is 1.1eV, is this sample A. p-type B. n-type C. intrinsic

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**INFLUENCE OF TEMPERATURE ON CARRIER CONCENTRATIONS**

SUMMARY INFLUENCE OF TEMPERATURE ON CARRIER CONCENTRATIONS For intrinsic semiconductors the carrier concentrations increase steadily as T increases. In Si, ni is small below 400K but increases rapidly above this temperature.

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**1. Ionisation region – the impurities are being ionised **

For extrinsic semiconductors the concentration vs. T plot has three regions: 1. Ionisation region – the impurities are being ionised 2. Extrinsic region – all the impurities are ionised; few electron hole pairs 3. Intrinsic region – electron-hole pairs produced in large numbers – material effectively becomes intrinsic There is a transition temperature below which devices must operate, otherwise pn junctions will be lost. 33

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**MAJORITY AND MINORITY CARRIERS**

Majority carriers - electrons in n-type and holes in p-type Minority carriers - electrons in p-type and holes in n-type np = ni2 In n-type: nn ≈ ND ; pn ≈ ni2 / ND In p-type: pp ≈ NA ; np ≈ ni2 / NA

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**THE FERMI-DIRAC DISTRIBUTION FUNCTION**

This is a statistical function giving the probability that a state at energy E is occupied by an electron EF is the FERMI LEVEL - the energy at which a state has a chance of occupancy.

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**The Fermi Level is approximately in the middle of the gap for an intrinsic semiconductor.**

The position of the Fermi Level is a measure of how n-type or p-type the material is. A degenerate semiconductor is one which is very heavily doped.

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