Presentation on theme: "Status of the Clermont-Ferrand R&D works Tilecal upgrade meeting at CERN (11 February 2015) François Vazeille on behalf of Clermont-Fd team ● Active Dividers:"— Presentation transcript:
Status of the Clermont-Ferrand R&D works Tilecal upgrade meeting at CERN (11 February 2015) François Vazeille on behalf of Clermont-Fd team ● Active Dividers: R&D completed (2 Tile Notes) ● Mechanics: handling tools ● Remote HV system ● FATALIC project: see talk of Laurent Royer Here: Other Front End information Very quick information 1
2 Mechanics ● No progress since the Valencia meeting! No reply to the mails! but we made a mistake: we forgot Ilya in our mails. No discussions! … and some worries! ● Example of the Black Box in Bld 175 ▪ The Demonstrator Patch Panel is too large: Outside the standard envelops ▪ Instead of revising its design Machining of the Black Box entrance specially designed to reproduce/test the envelop (so we loose the check of the envelop when inserting the Drawer). ● How to do? Proposition: to appoint a coordinator of the Mechanics outside the 3 concerned Institutes (Barcelona, Bucharest, Clermont-Ferrand). Tile Module envelop We are always ready to modify our Slider by integrating the Barcelona services.
Remote HV system ● Tile Note in discussion with Godfather: Sergei Chekanov Reviewers: Gary Drake and Oleg Solovyanov. ● Tests of the HV noise at the read out level (started on Monday) Three kinds of results from the recorded data: ▪ Stability of the applied HV from DCS data: RMS of applied HV. ▪ Integrator data: we have to find a way to quantify the noise. ▪ Read-out data: easier to quantify the noise. Noise = sqrt[ ( /µ) HV 2 - ( /µ) 0 2 ] with (RMS) and µ (Mean) of readout pedestal distributions with/without HV. 3
LPC ● Demonstrator set-up ANLLPCANL Patch Panel -Two Mini-Drawers max/option. -For the Remote LPC option: one 100 m long cable is available Separated tests of Drawers 1 and 4. - Active Dividers everywhere … but for some locations to locate precisely. Data LPC ANL 4 - Data just taken. - Results as soon as possible. - Only some indications here.
5 -No ANL/LPC comparison here : it will be discussed in a next meeting: only some LPC results. - Very good HV stability Example of Drawer LPC 1 for a short test of about 44 minutes with HV Opto channels 0-11 (re-labelled to fit readout labels). 1110987654321O 0.0520.0530.0500.0520.0620.0500.0330.0600.0470.0540.0470.056 Channel RMS (V) rms from 33 mV to 60 mV
Other Front End information ● See the talk of Laurent Royer about the status of FATALI, All-in-One and Main Board 0. ● Review of the Black Box in the Bld 175 (Roméo Bonnefoy) light tightness and safety of PMTs are two main concerns. Mounting of a black cover, but not enough at the right Repairs of µ-switches of the interlock chain (µ-switches in contact with the retractable black sides) Interlock connector: should be connected to HV Source 6
● 3-LED set-up for Front End tests ▪ Goals: FE realistic tests with Signal, Min Bias et Pile-up, with possibilities of playing with amplitudes and timing’s. ▪ Experimental lay out: Signal 1 (physics) + Signal 2 (pile-up) + DC (Min B.) PMT Block Main Board PC via Interface HV LV Driver 1 Driver 2 DC Pulse Gener. Delay Mechanical support with avec LEDs motion 132132 7
▪ Plan of measurements to do at 690V (February-March) -Noise without LED Pulses. -Pulses 1 alone synchronized with Clock, then shifted of ±3 ns, of various amplitudes to emulate the 3 gains. - DC 3 alone: obviously the high gain. -Pulses 1 + DC 3, with Pulse 1 conditions above. -Pulses 1 and Pulses 2 shifted of ±25, ±50 and ±75 ns. -Idem with Pulses 1 shifted of ±3 ns. -Pulses 1 and Pulses 2 shifted of ±25, ±50 and ±75 ns + DC 3. -Pulses 1 shifted of ±3 ns and Pulses 2 shifted of ±25, ±50 et ±75 ns + DC 3. This set-up could be used by the 3 options and lent to the Institutes 9 Comments: - Simulations of ANL shown this morning very useful for the DC 3 level. -Linearity tests over the whole dynamics made at CERN with the Laser. -In case of difficulties for tests at low LED amplitude (Bad Driver working), use of filters in front of LEDs to build low signals. -For very high signals, possibility of increase the PMT HV, after the check that the shapes are unchanged. - Data analyzed with the optimal filtering (with/without iteration).
● Comparison of the options Dedicated tables of issues will be submitted soon to the collaboration. 10 ● Availability of a Daughter Board at Clermont-Ferrand strongly expected … event though it is not the final version. We have to learn many things, including its link/working with the VC707 interface. Waiting for its delivery, we are obliged to replace it by Clermont-Fd interfaces … not suited to the Test Beam works. The schedule towards the Test Beam is very tight!