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Slide 1 Token Bit Manager for the CMS Pixel Readout 5 November 2003 Edward Bartz ( R.Stone ) Rutgers University CMS Pixel Electronics Systems Review Description.

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Presentation on theme: "Slide 1 Token Bit Manager for the CMS Pixel Readout 5 November 2003 Edward Bartz ( R.Stone ) Rutgers University CMS Pixel Electronics Systems Review Description."— Presentation transcript:

1 slide 1 Token Bit Manager for the CMS Pixel Readout 5 November 2003 Edward Bartz ( R.Stone ) Rutgers University CMS Pixel Electronics Systems Review Description of the TBM Functions First Prototype in DMILL 0.25  m Translation

2 slide 2 TBM Overview Orchestrate the Readout of Several Pixel Chips on a Single Analog Output Link Provide a Link Between the Front End Controller and the Pixel Chips For Control Commands  Custom, Mixed Mode, Rad-Hard, Chip Located Near Pixel Readout Chips

3 slide 3 Dual TBM Chip Two Token Bit Manager’s – Each TBM Controls one ROC Chain –8 to 24 ROCs per TBM Control Network Hub – Port addressing for control commands –6 to 14 Dual TBMs per Control Link –120 Links in the Detector ~1200 TBMs & 20,000 ROCs Dual TBM HUB TBM Chain of Read Out Chips Control Commands 40 MHz Clock CLK L1 Analog Output L1A Analog Output Analog Output Chain of Read Out Chips

4 slide 4 TBM Functions Write header and trailer (2 bit analog encoded digital) –8 bit Event Number  Header –8 bit Error status word  Trailer Distribute to Pixel Readout Chips (ROC) –L1 triggers (2 Outputs/TBM) –Clock (2 Outputs/TBM) Control readout through token pass Stack triggers awaiting token pass –32 event deep –No readout after 16 deep L1 Trigger TBM ROC L1 CLK Token In Token Out Analog Output Analog Output Clock Reset To Flash ADC

5 slide 5 Levels Chosen To Match ROC Output Levels Fully Adjustable –Gain Adjustment –Differential Offset Adjustment –Driver Current Adjustment Output Driver Identical to ROC Analog Output Note: Voltages are referenced to Analog Optical Link input. Levels 4&5 ROC Only

6 slide 6 TBM Control Features Analog Adjustments –Adjust Analog Levels –Disable Analog Output Trigger Control –Inject Any Trigger Type –Ignore Incoming Triggers –Disable Trigger Outputs Token Passing –Disable Token Passing –Reset Token Out Stack Control –Read Number of Events on Stack –Read Stack Contents (non-destructively) General Control –Switch Readout to 40 MHz or 20 MHz –Disable TBM Clock –Reset TBM

7 slide 7 Control Network Hub Up to 32 hubs addressable. 5 Ports per hub. –4 mI 2 C (40 MHz) external  ROCs. –1 mI 2 C (40 MHz) internal  TBMs. Functions of addressed hub. –Selects addressed port. –Strips off byte containing hub/port address. Passes remainder. –Reflects data back to Front End Controller. Dual TBM HUB TBM mI 2 C 4 mI 2 C Ports Output Only Control Link ROC

8 slide 8 Analog sections Stacks Control sections Hub 5.3 mm 4 mm DMILL Dual TBM 1 st (& only) Sub. 5/02 It Works!

9 slide 9 Power consumption 600 mW –core 140 mW –Differential Drivers 460 mW 6 Tested / 5 Fully Functional TBM Test Results Event # = 11 Status Reg. Header ID Trailer ID UBLK Token Pass Header marker 3 “UBLK” + “1” –8 Bit Event Number (4 Clocks) Trailer marker 2 “UBLK” + 2 “1” –8 Bit Status Word (4 Clocks)

10 slide 10 Analog Adjustability Before Adjustment After Adjustment TBM 1 TBM 2

11 slide 11 Header ID Event Number Status Info Trailer ID Expected Max CMS Trigger Rate = 100KHz 1 MHz Trigger Rate

12 slide 12 Hub Testing Serial Data Serial Clock mI 2 C Command Output From Port 0 Internal fast port - fully tested and functional External fast ports - fully tested and functional

13 slide 13 Changes For 0.25  m Reduce Power Consumption –Redesign LVDS Drivers –Minimize Clock Usage –Shut Down Clock when not needed Limit use of Analog bus –Pass ROC Analog Through TBM –Analog Output Line Driver Redesign Serial Protocol For CMS Optical Transceivers. –8 Bit data + Complement Bit 8  4 Bit data + Complement Bit 4 –Request Modification to Optical Receiver Chip Allow Transition Dual  Single TBM Operation

14 slide 14 TBM Operation Modes

15 slide SEU cross section of 0.25  m Flipflop 300 MeV/c pion beam Standard:  =2 x cm 2 Protected:  =2 x cm 2 (284 ff per DTBM) Single Event Upset TBM Placement Expected Flux (MHz/cm 2 ) Time Per SEU Protected F/F (Hrs/SEU) 4cm Barrel4012 7cm Barrel cm Barrel/ Foreward 860 [cm 2 ] Standard Latch Protected Latch

16 slide 16 “Fast” Hub 0.25  m Hub IBM Process –3 metal layers –MIMCaps “Fast” Hub –Normally Part of TBM –Tested in Simulation with ROC Control Section –PSI Low Power LVDS Drivers “Slow” Hub –Can reside on same control link as Fast hubs –Provides Control data for PLL & Laser Drivers Via I 2 c Protocol Submitted June 2003 Received: Sept. 19, 2003 “Slow” Hub

17 slide 17 Slow Hub Modified Version of Fast Hub Serial Data In 40 MHz Clock Slow Clock Out Start-Stop 8 Bit Reg. Address Compare 1 to 7 Decoder 1 to 7 Decoder 7 to 1 Mux Divide By 256 Odd Data Bits Slow Data I/O Serial Data Return Modifications

18 slide  m Dual TBM 3.2 mm 4.4 mm Analog Readout Analog Power Regulators Hub Stacks Control Sections IBM Process –3 metal layers –MIMCaps 3 voltage regulators –Core Digital –Analog –LVDS Drivers Pad Dominated Completed: October 2003 –CERN rules check now –Nov 10 th MPW submission

19 slide 19 2 nd 0.25  m Version Analog Readout Analog Power Regulators Hub Stacks Control Sections Fix any bugs? Improvements –Rad-Hard regulator band gap reference –More flexibility in token passing (bypass non- responding ROC segment) –TBM Aout driver enhancements Spring 2004 submission?

20 slide 20 Conclusion Dual TBM worked on first DMILL submission 0.25  m Fast and Slow Hubs are Awaiting Testing 0.25  m TBM Complete –10 November 2003 MPW Submission Second 0.25  m Prototype Submission Anticipated Production TBM Available End of 2004


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