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1 Modeling and Optimization of VLSI Interconnect 049031 Lecture 9: Multi-net optimization Avinoam Kolodny Konstantin Moiseev.

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Presentation on theme: "1 Modeling and Optimization of VLSI Interconnect 049031 Lecture 9: Multi-net optimization Avinoam Kolodny Konstantin Moiseev."— Presentation transcript:

1 1 Modeling and Optimization of VLSI Interconnect Lecture 9: Multi-net optimization Avinoam Kolodny Konstantin Moiseev

2 2 Outline  Kinds of layout structures  Interconnect bundle definition  Optimization objectives  Optimization domains  Optimization problems:  Minimization of bundle average delay  Minimization of bundle maximum delay  Minimization of bundle power

3 3 Multi-net optimization Interconnect bundle Random layout Random layout Sizing Spacing Ordering Sizing Spacing Ordering Spacing

4 4 Layout example. M5-M6

5 5 Homogenous and non-homogenous bundles Homogenous bundles Non-homogenous bundles

6 6 Homogenous Interconnect bundle  A bundle of parallel wires  All wires have the same length  Start and end at the same point  Bounded by shield wires from both sides  Total routing area is limited

7 7 What do we want to optimize?  Denote:  - the delay of net  - the required time of net  - the power of net  Delay objectives (minimization): - Total sum of negated slacks (average negated slack) - Total sum of delays (average delay) - Maximum negated slack - Maximum delay

8 8 Additional objectives  Power objective: Total bundle power  Mixed power-delay: Total weighted power-delay sum  Noise objectives: Total delay uncertainty Maximum delay uncertainty

9 9 Discrete vs. continuous optimization  In recent technology generations manufacturing limitations restrict allowed wire widths and spaces to a very few discrete values  Not all width and space combinations are allowed  This kind of constraints calls for discrete optimization problems  usually NP-complete  very hard to solve  As opposite, continuous optimization usually simple to solve and many iterative algorithms exist x 2x 3x

10 10 Constraints  Total bundle area is limited:  Design rules (continuous):  We will later consider problem with discrete design rules

11 11 Interconnect bundle RC model

12 12 Minimization of average wire slack (delay)  The box constraints on wire width and spacing are ignored  They do not change problem behavior

13 13 Convexity of the problem  Theorem: problem Bundle Average Delay Minimization is convex  Proof:  The area constraint is linear and therefore convex  Let us rewrite an objective function:  The first sum is a positive sum of one-variable problems, each of which is convex, and therefore, convex function  The second sum is the function  To prove convexity need to show: for any  It is true. HW: prove it

14 14 Single net behavior L=300 um R d =100 Ohm C l =15 fF

15 15 Problem solution with LR  Lagrangian Relaxation (LR) is applied to eliminate constraint equations

16 16 Square root sum property  Manipulation with equations reveals the following property of the wire spaces:  The square appears because of cross cap modeling as, for would appear  The propery is preserved for any kind of optimization of the form  The meaning is that spaces are shared equally between neighbor wires

17 17 S0S0 S1S1 S2S2 S3S3 S4S4 Square root sum property (2)

18 18 Minimization of worst delay (slack)  Problem definition:

19 19 Problem properties  Optimization problem is not differentialbe  Cannot be solved analytically  Optimization problem is convex.  Proof:  Introduce new variable and rewrite the problem as follows:  All constraints as well as objective function are convex.■

20 20  Theorem (necessary condition). In the optimal solution of minimizing the maximal delay (or the worst slack) subject to area constraint, all the delays or slacks are equal.  Proof:  The maximum delays was reduced and the other delays did not exceed it. Contradiction■ Equality of delays T i-1 TiTi T i+1

21 21 Equality of delays  Another proof:  Approximate maximum delay function as 

22 22 Sufficient condition  The equality condition is necessary but not sufficient  There can be bundle with all wire delays equal, but not minimum  Define area preserving local modification as a change of triplets or so that or are invariant  Area preserving local modification affects only delays of two or three neighbor wires  Postulate: aside from any equal delay or slack solution other than the MinMax, there exists an area preserving local modification which reduces the delay or slack of a signal without increasing the delay of any other signal.

23 23 Sufficient condition  Theorem (sufficient condition): All the delays in the max delay or the worst slack objective function are equal to each other. This is then the MinMax solution if, for all and any the following relations exist:  These relations gurantee that no local area preserving modification exist

24 24 Iterative algorithm for MinMax delay or slack

25 25 The relation between MinMax and Total Sum solutions  Both MinMax and Total Sum can be seen as different norms on the same n-dimensional signal delay vector space:  The norm equivalence theorem states that there exist real positive numbers and so that  This means that an optimal solution of minimizing the total sum of delays is also a good MinMax solution and vice versa

26 26 The relation between MinMax and Total Sum solutions  Theorem: If, and are the smallest, average and largest delay, respectively, among all the bundle signals in the optimal solution of the minimal total sum of delays and is the delay of each signal in the MinMax solution, then

27 27 Optimization examples: Sum of Delays

28 28 Optimization example: MinMax delay

29 29 Cyclical representation  For such a configuration, if all drivers and receivers are identical, then all widths and spaces are identical in both MinMax and TotSum optimizations

30 30 Non-uniform bundle optimization MinMax optimization

31 31 Non-uniform bundle optimization TotSum optimization

32 32 Dependence on bundle width

33 33 Optimization of total bundle power  It is clear that to minimize power all widths should be assigned minimum width  Therefore, power minimization is reduced to optimal inter-wire space allocation (i.e. power contributed by cross-coupling capacitance)

34 34 Optimal distribution of cross-coupling capacitance

35 35 Convexity of the problem  Theorem: Bundle Power Minimization problem is convex  Proof:  The objective function is separable to the positive sum of one-dimensional convex problems and therefore convex  The constraint is linear and therefore convex

36 36 Problem solution  As in case of total sum of delays, LR is applied

37 37 Capacitance density  Let us denote  Therefore  In optimal cross-coupling capacitance distribution, weighted (by activity of neighbor wires) capacitance density for all the wires must be equal “Capacitance density”

38 38 Solution of optimization problem  Full analytical solution is easily derived from the equations:

39 39 Solution of optimization problem  With optimal values of spaces, total power is expressed as:  The sum is intriguing…  Let’s wait for the next lecture to meet it closely!!!


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