Presentation on theme: "1 PC Peripherals for Technicians PC Peripherals for Technicians Chapter 2.1 - Chapter 2.1 - Storage: Floppy Drives Systems Manufacturing Training and Employee."— Presentation transcript:
2 Storage: Floppy Drives OBJECTIVES: At the end of this section, the student will be able to do the following: l Describe the components of the Diskette Sub-system l Describe the floppy disk drive interface cables. l Discuss the Floppy Disk Controller registers and list the FDC I/O addresses. l List the sequence of operations in a DMA Transfer. l Discuss floppy diskette BIOS INT 13h support. l Explain the structure of DOS and the MS-DOS floppy boot process.
3 Block Diagram of Floppy Sub-system Inputs: Rd, Wr, A[0:2], TC, CS, RST, DACK2, etc. Outputs: DRQ2, IRQ6, etc. Bi-Dir: DB[7:0] Bus I/F Logic Inputs: RdData, DskChg, INDX, WrProt, TRK0, etc. Outputs: WrData DrvSel, Step, HdSel, DenSel, etc. Drive I/F Logic FDC (Floppy Disk Controller) Host Bus Interface Logic Control Register Status Register Drive Interface Logic Floppy Drive(s) System Bus (e.g. ISA) Floppy Drives are accessed through the FDC and not directly by the CPU.
4 The Floppy Disk Sub-system l The Floppy Disk Controller (FDC) is the heart of the Diskette system & connects each drive to the system. The FDC controls all communications & data transfers between the system bus & the floppy drives(s). » Beginning with the PC/AT, the BIOS supports 2 drives. l The FDC architecturally resides on the ISA bus. FDC interface consists of an 8-bit bi-directional data bus, control signals, and several registers. l The NEC uPD765, Intel 8272, & Intel are commonly used single chip Floppy Disk Controllers. The FDC is often integrated into “super I/O” chips such as the National PC87308 or the SMC FDC37C932FR.
5 Floppy Disk Sub-system: Diskette Information on Floppy Disk Structure on following pages. 1. Drive head 2. Track 3. Sector Each track is divided into individually addressable sectors
6 Floppy Disk Sub-system: Diskette l (80 tracks * 15 sectors/track) * 2 sides * 0.5 Kb/sector = 1.2 Mb l (80 tracks * 18 sectors/track) * 2 sides * 0.5 Kb/sector = 1.44 Mb DENSITYMEDIA TRACKSSECTORSSPEED # OF CAPACITYCAPACITY TRANSFER SIZE (per side)(per track) (RPM) CYLINDERS (formatted) (unformatted) RATE (in inches) DOUBLE K 360 K 300 Kbps HIGH Meg 1.6 Meg 500 Kbps DOUBLE K 1.0 Meg 250 Kbps HIGH Meg 2.0 Meg 500 Kbps EXTRA Meg 4.0 Meg 1 Mbps Note: 512 BYTES / SECTOR; bps = bits per second
7 Floppy Disk Sub-system: Diskette l 360K (Double Density) was the PC/XT format. l 5.25 inch, 1.2 Meg format (High Density) was introduced by IBM with the PC/AT in l 3.5 inch, 720K disk (Double Density) was introduced by IBM in its first PS/2 computers in l 3.5 inch, 1.44 Meg Disk (High Density) is now the "new" industry standard. l 3.5 inch, 2.88 Meg format (Extra Density) was introduced by IBM but has not been used much. Note: There is also a “Density Select” output from the FDC to the drive (Pin 2) that refers to data transfer rates (e.g. 500Kbps) which is different than the “Recording Density” (e.g. Double, High, Extra). » 0=Low Density: Kbps; 1=High Density: 500Kbps -1 Mbps
8 Floppy Disk Sub-system: Diskette l The floppy disk is rotated only when accessed. A magnetic read/write head assembly is moved back and forth across the surface of the disk by a stepper motor, and gets to a position because of “steps” by the motor. » No feedback indicating where the head is on the disk. The head stays in physical contact with the disk medium at all times, causing wear. l A floppy disk format does BOTH a low-level & high- level format at the same time. Low Level formatting divides each track into sectors by placing Address Marks & Sector IDs around the track. High level formatting sets up the O/S file system structure (boot record, FAT, directory, etc.)
9 Floppy Disk Sub-system: Head l The head reads or writes magnetically encoded patterns (serial bit streams) that represent digital data. There are two heads so data is stored on both sides of the diskette--heads are numbered 0 and 1. > Note: The first IBM PC's used a single sided floppy disk drive. As the disk rotates under the write-head, a small current is applied to the coil in the disk head. » Spots of the disk metallic oxide become magnetized and thus "remember" the magnetic field which was imposed. Reading is essentially the writing process in reverse. » Magnetic spots on the disk create protruding magnetic fields and a small electric current is induced in the head. » A sensitive Read Amplifier boosts this signal up to useable strength for interpretation as the data stored on the disk.
10 Floppy Disk Sub-system: Track l The area of the disk that passes under a single head during one complete spin of the disk traces a circle. Data is recorded in concentric circles called tracks or cylinders. » The terms are often used interchangeably, but track traditionally refers to a single ring on one side of a disk, and cylinder refers to a stack of tracks. l The positioning of the heads from track to track by a stepper motor is called seeking. Tracks are numbered sequentially, starting with the outermost track (track 0) and can be a maximum of either 39 or 79 per side (40 or 80 tracks). » The head is “recalibrated” (moved to track 0) by issuing the “recal” command to the FDC.
11 Floppy Disk Sub-system: Sector l The data on each track is divided into equal size pieces called sectors (the basic unit of data storage) Sectors are numbered sequentially, starting from “1” » Typically 9, 15, 18 or 36 sectors per track. All sectors hold 512 bytes of data on a DOS PC » Other Operating Systems may use different size sectors Each sector also has a few Bytes of "Overhead" » Overhead bytes Identify the Sector, provide Error Checking Check Sums, Synchronization data, defined gap areas, etc. Only the 512 bytes of data in the data field are written to in normal operation.
12 Floppy Disk Drive Interface Floppy Drives normally use two cables l 4-wire Power cable. 5.25 inch drives require a +12 volt and a +5 volt supply Current 3.5 inch drives only require a +5 volt supply. l 34-wire Control/Data cable The Control/Data connector, at the floppy controller is dual-row pin type connector (2X17). The Control/Data connector at the floppy drive is a card- edge type for 5.25" drives, and a mixture of pin or card- edge types for 3.5" drives NOTE: Pin #1 on any drive cable SHOULD be indicated by a colored stripe.
13 Floppy Disk Drive Interface ControllerDrive-2 (B:)TwistDrive- 1(A:) - After the Twist |::|===================|::|========x=======|::| 1 Ground18 Head direction 2 Density select (Data Rate)19 Ground 3 Ground20 Step 4 Not connected21 Ground 5 Key (pin missing)22 Serial Write data 6 Extended density in23 Ground 7 Ground24 Write enable 8 Index25 Ground 9 Ground26 Track 0 10 Motor A on27 Media Sense 0 11 Ground28 Write protect 12 Drive B select29 Ground 13 Ground30 Serial Read data 14 Drive A select31 Ground 15 Ground32 Head select side 1 16 Motor B on33 Ground 17 Media Sense 134 Disk change A twist in the 34-wire cable between wires 10 and 16 just before the connector for drive 1, transposes the control signal between one drive and the next. If only one drive (A:) is used, leave middle connector free. Details next pages. Media Sense Pins 17, 27--Drive outputs to indicate type of media installed (720k, 1.44M, etc)
14 Floppy Disk Drive Interface l IBM devised a method to eliminate having to change floppy drive jumpers on the assembly line. » Floppy disk drive select jumpers configure the drives as either the 1st (jumper= 0) or 2nd (jumper= 1) drive. Most PC's use a standard cable where both drives are jumpered as the 2nd drive (Physical Drive 1). Adding the twist in the the 34-wire cable between wires 10 and 16 effectively changes the drive number setting on the floppy drive after the twist from Physical Drive 1 (B: 2nd drive) to Physical Drive 0 (A: 1st drive). » If only “A:” drive is used, leave the middle connector free. Note: Some O/S’s allow a single physical drive to appear logically as both A: and B:
15 Floppy Disk Drive Interface l A twist between wires 10 & 16 transposes the control signal between one drive and the next. » Both Drive-2 (B) & Drive-1(A) are jumpered as 2nd drive (B) ControllerDrive-2 (B:) Twist Drive-1 (A:) After the Twist |::|===================|::|=========x===|::| Controller Drive (B)Drive (A) Wire Wire 10 (Mtr A on)1016 Wire 12 (B select) 1214 Wire 14 (A select) 1412 Wire 16 (Mtr B on)1610 Wire i.e. - Drive A: responds to “Mtr A on” on pin 16 because it is jumpered as Drive B: (responds as A: due to twist).
16 Inputs: Rd, Wr, A[0:2], TC, CS, RST, DACK2, etc Outputs: DRQ2, IRQ6, etc Bi-Dir: DB[7:0] Bus I/F Logic Inputs: RdData, DskChg, INDX, WrProt, TRK0, etc. Outputs: WrData DrvSel, Step, HdSel, DenSel, etc. Drive I/F Logic Floppy Disk Controller Host Bus Interface Logic Control Register Status Register Drive Interface Logic Floppy Drive(s) System Bus Floppy Drives are accessed through the FDC and not directly by the CPU. Floppy Disk Controller: Overview
17 Floppy Disk Controller: Overview l The FDC incorporates a PLL, microcontroller, a data separator, and drive, host & serial interface logic. The FDC architecturally resides on the ISA bus. The FDC is typically clocked by a single 24 MHz signal. The FDC can be reset by hardware or software The FDC controls all communications & data bus transfers between the system bus & the floppy drives(s). » FDC interface consists of an 8-bit bi-directional data bus & several registers. Data transfers to/from the FDC are controlled by the DMA controller. » The FDC is hardwired to DMA Channel 2 (DRQ2, DACK2) for compatibility with the IBM-defined standard.
18 Floppy Disk Controller: Registers l The FDC receives commands, transfers data, and returns status information using CPU I/O read & write operations to the FDC registers. FDC I/O addresses are 3F2, 3F4, 3F5 & 3F7 » 3F2 = Digital Output Reg [control]; 3F4 = Main Status Reg » 3F5 = Data Reg [FIFO]; 3F7 = Digital Input Reg. Note: Register support and use vary by platform. » Ports 3FO & 3F1 used by some systems. l Detailed FDC register description and programming is beyond the scope of this course. Techs may find the following registers (which apply to all systems) useful for debugging floppy problems.
19 Floppy Disk Controller: Registers l FDC Digital Output Register (DOR) at port 3F2h Controls drive motors & drive selection » Note: All DOR bits are cleared during controller reset Bit 0 & 1: floppy drive select (0=A, 1=B, 2=floppy C,...) Bit 2: 1 = FDC enable, 0 = FDC reset Bit 3: 1 = DMA & I/O interface enabled Bit 4: 1 = turn floppy drive A motor on » e.g. Writing 10h to port 3F2 turns on Drive A: motor > Software may write 0C to turn off motor(s)--Bits 2 & 3 enabled. Bit 5: 1 = turn floppy drive B motor on Bit 6 & 7 used for Floppy C & D on older systems. » Most systems only support 2 drives (A & B).
20 Floppy Disk Controller: Registers l FDC Digital Input Register at 3F7h (Read only) Returns the state of the “diskette change” line which signals when the door is open. » Bit 7:0 = Present & not changed; 1= Diskette changed Software uses the change line to know that a disk may have been changed by reading Port 3F7 bit 7. » Then the O/S does not have to access the FAT on the floppy disk to recognize that a new disk has been inserted. > Note: Use an O/S such as DOS to access the diskette to see this bit change. Only bit 7 of Port 3F7 is used in PC/AT mode. » Note: Port 3F7 is shared by the hard disk controller on the PC/AT which returns information on the lower 6 bits.
21 Floppy Disk Controller: Notes l Write-Protection takes the form of an LED, a photo- detector diode and a status bit in a register of the FDC. Floppy disks are hardware "write-protected" with a hole & plastic slider (3.5” disks) near the corner of the disk. » Uncovering the notch write-protects the disk. Software checks a status bit (Status Reg 3F5) in the floppy controller (during the results phase of a command) to determine that a disk is "write-protected". » An error routine then aborts the disk write and informs the user. Note: You cannot override the physical write-protection through software.
22 Floppy Disk Controller: Operation l The FDC has an extensive command set: Read Data, Write Data, Format Track, Recalibrate, etc. l FDC operations are processed in phases: 1. Command phase: Commands are sent from the CPU to the FDC data register via port 3F5h 2. Execution phase: The FDC executes instructions (performs the desired command) & generates IRQ6 3. Result phase: System reads a series of bytes from the FDC data register (port 3F5h) indicating command status 4. Idle phase: After hardware or software reset or when no commands are in progress.
23 Floppy Disk Controller: Operation l Overview of a read operation: Turn disk motor on and set delay time for drive spin up Perform seek operation; wait for disk interrupt (IRQ 6) Prepare DMA chip to move data to memory Send read cmd; wait for xfr complete interrupt (IRQ 6) Read status information Turn disk motor off l Note: These tasks are usually performed by the O/S [Operating System] and/or the BIOS using INT 13h. See following pages for description of BIOS INT 13h.
24 DMA Transfer Example : Floppy Read l Data transfers between the FDC and system memory are controlled by the DMA controller. This is an example of a DMA transfer between a Floppy Disk device and Memory on a system with a PCI bus using the Chip-set. NOTE: This example assumes the Floppy Controller & DMA controller are already programmed, possibly via BIOS INT 13H or DOS INT 25H, 26H. » The floppy sub-system has already been initialized with the cylinder number, head number, start sector, & number of sectors to read. » The DMAC has already been initialized with memory buffer address, number of transfers, & operation type (I/O Read and Memory Write)
25 CPU or ChipSet MEMORY DMA Ctrl and Page Regs. Floppy Ctrl Address Bus Data Bus DREQ2# DACK2# TC (terminal Count) HOLD/ PHOLD HLDA/ PHLDA IOR# MEMW# DMA Transfer Example : Floppy Read Explanation follows on next few pages.
26 DMA Transfer Example : Floppy Read 1) When the floppy controller reads data from the diskette, it requests a transfer by raising the DMA request line (DRQ2) to the DMAC. 2) The DMAC responds by asserting (PCI) Hold Request (PHOLD# on the Chip-set) 3) When the bus is granted to the DMAC, Hold Ack. is asserted (PHLDA# on the Chip-set). 4) The DMAC asserts the DACK2# signal to notify the FDC that the transfer cycle is now started. » The #DACK is effectively the device select and is similar to an I/O address decode for the selected device. » The FDC now deasserts DRQ2 because the DMA controller is servicing the data transfer request.
27 DMA Transfer Example : Floppy Read 5) The DMAC places a memory address on the bus and at the same time the DMA Page Register places a page number on the high memory address lines. 6) The DMAC activates the control signals to effect the transfer. » Floppy Read / Memory Write Transfer--#IOR and #MEMW 7) For the floppy drive, only one byte is transferred: » The DMAC transfer counter is decremented. » The DMAC memory address is incremented. » The DMAC releases the Hold Request (PHOLD#) giving the bus back to the ChipSet. » The DMAC DACK2# to the FDC is deasserted.
28 DMA Transfer Example : Floppy Read 8) This process continues until the transfer is complete and the DMAC Transfer Counter is decremented to zero. » e.g. - All 512 bytes of one sector is transferred. 9) When the transfer is complete the DMAC sends the TC (Terminal Count) signal to the Floppy Disk Controller. » TC signals the FDC that all bytes have been transferred. 10) The FDC activates the IRQ6 signal (results phase). » The IRQ6 ISR reads the FDC Status Registers and writes them into the 7 bytes of the BIOS Data Area. > Reading the Status clears the interrupt request (IRQ6) » The IRQ6 ISR also sets bit 7(diskette H/W INT occurred) of the byte in the BIOS Data Area at 40:3E, which the BIOS uses to determine if the disk operation has completed.
29 DMA Transfer Example : Floppy Read 11) The floppy drive motor is shut off by a timer located in the BIOS data area at 40:40 (Diskette Motor Time-out) » Whenever any disk activity occurs, this byte is loaded with a countdown value (~2 seconds). > If another diskette action occurs before the counter expires, the timer is reset to begin counting again. » The PIT- CT0 Output is tied to 8259 PIC IRQ0 and causes an INTERRUPT TYPE 8 (Time Of Day Interrupt.) > The Interrupt Service Routine for IRQ0 decrements the byte at 40:40 in BIOS Data Area every 55 ms (18.2 Hz). > If the count reaches zero, the ISR issues a command to shut off the disk drive motor if it is on (BIOS Data Area 40:3Fh stores diskette motor status). » Debug Hint: If the Floppy Drive Motor LED stays ON after accessing the drive, check the 8254 Timer & the 8259 Interrupt Controller operation.
30 BIOS Diskette Support l BIOS interrupts are often used in ITP Debug Procs to read, write, and verify floppy operation. Note: Because the CPU is not involved in DMA floppy transfers, using BIOS interrupts is a method to stimulate the FDC, DMA, & Memory signals involved in floppy data transfer operations. l INT 13h invokes BIOS Diskette & Fixed Disk Service. INT 13h programs the DMA & floppy controller registers and executes the required operation (e.g. read sector). » Note: If a fixed disk is present, the BIOS redirects all INT 13h Diskette Request services to INT 40h. > This is transparent to the user & users should continue to invoke INT 13 for both diskette and fixed disk services.
31 BIOS Diskette Support l The Floppy Disk Drive I/O INT 13h interface provides access to the disk drives supported by the system. l Partial list of the functions (AH values) for INT 13h AH ValueFunction 00HReset disk drive 01HRead status 02HDisk read 03HDisk write 04HDisk verify 05HFormat disk track
32 BIOS Diskette Support l INT 13h Function 2 reads the specified sector(s) from the specified side of a disk and stores the data in a memory buffer at address ES:BX. » Input: AH = 02H (Function 2) AL = Number of sectors CH =Track number; CL = Sector number DH = Head number; *DL = Drive number ES:BX = Address of buffer * Bit 7 = 0 for Floppy Drive; Bit 7 = 1 for Fixed Drive » Output: AH = Status; AL = Number of sectors transferred CF = 1 if Error; Carry Flag = 0if No error Disk Write uses same registers except AH = 03
33 l Example -- Read Diskette Boot Sector into memory » MOV AX,8000;Buffer area defined by ES:BX » MOV ES,AX;Data will be put in 8000 :25 » MOV BX,25;80025 Physical (~ 512Kb DRAM area ) » MOV AH,02;Function 2 of INT 13 is READ SECTOR » MOV AL,01;AL= # of Sectors to read = 1 » MOV CX,1;CH = Track # 0, CL= Sector #1 » MOV DX,0;DL= Head 0, DH= Drive #0 (A:) » INT 13;Transfer Boot Sector to 8000:25 Note: Spin up floppy disk before reading the data. » Function ”0” is often invoked in ITP procs prior to Function ”2” to get disk spinning. > This resets the disk controller & recalibrates head to track zero. BIOS Diskette Support
34 The Structure of DOS Interrupt Vector Table BIOS DATA DOS DATA I/O. SYS Non-resident BIOS COMMAND.COM Command Processor MSDOS. SYS Kernel 0000h 0400h 0500h 256K 512K A0000h 640K ~0700h ~12F0h ~2740h ~5DD0h / FB10h DEVICE DRIVERS 64K 128K COMMAND.COM Transient Command Processor Look at the structure of MS-DOS before describing the DOS Boot Process. Note: Addresses will vary depending on DOS Version!
35 The Structure of DOS APPLICATIONS O/S: [ BIOS / KERNEL / COMMAND PROCESSOR] SYSTEM BIOS (RESIDENT) HARDWARE l The PC/AT has a “layered” operating system. The O/S serves as an interface between the Application Program (Word, Excel, etc) and the Hardware. SYSTEM BIOS provides low-level interaction with the hardware. DOS has a hierarchical structure. Three layers isolate the user and the application program from the hardware. > Non-resident BIOS > IO.SYS or IBMBIO.COM > Kernel > MSDOS.SYS or IBMDOS.COM > Command processor > COMMAND.COM IO.SYS & MSDOS.SYS "Hidden" & "Read Only" so they can't be deleted from the disk.
36 The Structure of DOS l The non-resident BIOS (IO.SYS) is the lowest layer of MS-DOS and interacts directly with the hardware. IO.SYS is not resident until it is read into main system memory (DRAM) from disk or network when the computer loads the operating system. » Note: The SYSTEM BIOS is called the resident portion and is built into each computer by the computer manufacturer. IO.SYS may contain modifications or updates to the SYSTEM ROM BIOS that are needed to add support for other types of hardware (e.g. new disk drives). l The second component is the DOS Kernel. This is the actual DOS program & the heart of the O/S. » In MS-DOS this file is called MSDOS.SYS
37 The Structure of DOS l The third component is the Command Processor. » In MS-DOS this file is called COMMAND.COM This is the “shell” that contains all of the internal DOS commands, produces the familiar “A:\>“ or “C:\>“ prompt, and carries out user commands. l On a floppy disk, the “BOOT SECTOR” is located in logical sector 0 (Sector One of Track Zero, Side Zero). The Boot Sector is only 512 Bytes long and contains: » A record of the disks format. » A Boot Strap Loader program which reads the bulk of the operating system (IO.SYS, MSDOS.SYS, & COMMAND.COM) into memory from elsewhere on the disk and then to transfers control to the operating system.
38 MS-DOS BOOT PROCESS (Cont.) Here is part of the boot sector in hex and ASCII. Offset A B C D E F * ABCDEF* l eb3c904d 53444f53 352e *.<.MSDOS * l e bf l a e 4f204e41 *......)ZT.&NO NA* l d fa33 *ME FAT12.3* l c08ed0bc 007c1607 bb c5371e56 *.....|...x.6.7.V* Boot loader code starts at offset 3Eh and ends at offset 19Dh l ca86e98a 16247c8a 36257ccd 13c30d0a *.....$|.6%|.....* l 0001a0 4e6f6e2d d b20 *Non-System disk * l 0001b0 6f b f 720d0a52 *or disk error..R* l 0001c c e *eplace and press* l 0001d e79 206b e * any key when re* l 0001e d 0a00494f *ady...IO SY* l 0001f0 534d5344 4f aa *SMSDOS SYS..U.*
39 MS-DOS BOOT PROCESS (Cont.) The major sections in the BOOT SECTOR are: » The first byte in the boot sector is an x86 jump instruction (i.e. ”eb 3c”) to the bootstrap code in the final section. » The next section is where an OEM software manufacturer’s name and version can be found (e.g. - MSDOS5.0.) » The next section contains information about the disk’s physical characteristics which is needed by MS-DOS. » The final section in the boot sector contains the disk bootstrap (starts at offset 3Eh and ends at offset 19Dh for the version of DOS shown.) » The last 2 bytes (1FE & 1FF) of the boot sector contain the 55AAh signature to indicate that the data in the boot sector represents a bootstrap program.
40 MS-DOS BOOT PROCESS (Cont.) A high level view of the process of loading DOS l 1 - Power up and run POST. The remaining steps are accomplished at the end of POST and are the beginning of the O/S Boot process. » The Bootstrap Loader interrupt is invoked via the “INT 19h” instruction imbedded in the System BIOS EPROM's. > The Boot Strap Loader is a very simple program used with the BIOS ROM to load the O/S from the boot disk. l 2 - System BIOS reads the disk boot sector (track 0, head 0, sector 1) into system memory at 0000:7C00h, then transfers control to that address. If no boot sector is found on the primary boot device, BIOS looks for a boot sector on a secondary boot device if present.
41 MS-DOS BOOT PROCESS (Cont.) l 3 - If no boot sector is found on any disk, BIOS calls INT 18h, which displays an error message such as “NO Boot Device Available” and halts the system. Some Network Interface Cards contain boot ROMs that trap INT 18h so that a system attached to a network can boot without using a floppy or hard disk. NOTE: INT 18h on the original IBM PC transferred control to ROM BASIC (no longer supported). l 4 - The bootstrap loader confirms there are directory entries for IO.SYS & MSDOS.SYS and loads these system files. If errors occur, a message such as “Non System Disk” is displayed.
42 l 5 - Program control is then transferred from the bootstrap loader to IO.SYS. l 6 - IO.SYS calls MSDOS.SYS. MSDOS.SYS initializes interrupt vectors used by DOS. » DOS primarily uses vectors 20h, 21h, 25h, 26h, & 27h. l 7 - MSDOS.SYS checks to see if a CONFIG.SYS file exists. If CONFIG.SYS exists, modify DOS parameters & install user-specified device drivers (i.e. DEVICE=ANSI.SYS) Otherwise, use default DOS parameters. l 8 - IO.SYS loads COMMAND.COM as the default shell (Command Interpreter). MS-DOS BOOT PROCESS (Cont.)
43 l 9 - If an AUTOEXEC.BAT file is present on disk the commands in AUTOEXEC.BAT are executed. » Typical functions carried out by this file are: > Set the system prompt (e.g. A:\>) > Set-up a search path DOS uses when looking for programs > Automatically runs programs required on start-up Otherwise, issue DOS DATE and TIME commands. l 10 - COMMAND.COM displays the DOS prompt (A:) and waits for user input. » COMMAND.COM contains the internal DOS commands as well as the DOS command processor responsible for processing your commands. l The PC is now ready for user input. MS-DOS BOOT PROCESS (Cont.)
44 REVIEW & SUMMARY FDC (Floppy Disk Controller) Host Bus Interface Logic Control Register Status Register Drive Interface Logic Floppy Drive(s) System Bus Floppy Drives are accessed through the FDC and not directly by the CPU. 1. Drive head 2. Track 3. Sector Each track is divided into individually addressable sectors
45 REVIEW & SUMMARY WE HAVE DISCUSSED THE FOLLOWING: l The components of the Diskette Sub-system The FDC controls all communications & data transfers between the system bus & the floppy drives(s). 3.5“ 1.44 Meg (High Density) is the industry standard. The floppy disk is rotated only when accessed & the head stays in physical contact with the disk medium. » The head assembly is moved by a stepper motor, and there is no feedback on where the head is on the disk. Data stored on both sides of the disk--heads #0 & #1. Data is recorded in concentric circles called tracks. Each track is divided into equal size sectors--512 bytes.
46 REVIEW & SUMMARY l The floppy disk drive interface cables. 4-wire Power cable. +12 volt & +5 volt supply. 34-wire Control/Data cable--twist between wires 10 & 16 changes the drive number after the twist from “B” to “A”. » If only one drive (A:) is used, leave middle connector free. l Floppy Disk Ctlr registers & the FDC I/O addresses. The FDC architecturally resides on the ISA bus, consists of an 8-bit data bus, control signals, & several registers. The FDC receives commands, transfers data, & returns status information using CPU I/O read & write operations. FDC operations are processed in phases: » 1-Command; 2-Execution; 3-Result; 4-Idle phase.
47 REVIEW & SUMMARY l The sequence of operations in a DMA Transfer. FDC requests a transfer by raising DRQ2. Bus arbitration--PCI Hold Req (PHOLD#) & PHLDA#. DACK2# from DMAC to FDC. Mem address put on the bus; activate #IOR & #MEMW. 1 byte transferred; PHOLD# & DACK2# deasserted. After 512 bytes transferred, DMAC sends TC to the FDC. FDC activates IRQ6 (results phase). Floppy Drive motor shut off by IRQ0 ISR. l The floppy diskette BIOS INT 13h support. INT 13h Function 2 reads specified sector(s) and stores the data in a memory buffer at address ES:BX.
48 REVIEW & SUMMARY l The structure of DOS & the DOS floppy boot process Three layers: IO.SYS; MSDOS.SYS; COMMAND.COM Power up and run POST - INT 19h at end of POST. Read disk boot sector into 0000:7C00h. Loads IO.SYS & MSDOS.SYS; xfr control to IO.SYS. IO.SYS calls MSDOS.SYS; Check for CONFIG.SYS. IO.SYS loads COMMAND.COM. If present AUTOEXEC.BAT is executed. COMMAND.COM displays prompt & waits for user input. End of Chapter 2-1