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RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE MODELLING an H.264/AVC DECODER USING FPGA. Eng. Orlando Landrove. November, 2014.

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Presentation on theme: "RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE MODELLING an H.264/AVC DECODER USING FPGA. Eng. Orlando Landrove. November, 2014."— Presentation transcript:

1 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE MODELLING an H.264/AVC DECODER USING FPGA. Eng. Orlando Landrove. November, 2014

2 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Introduction (I)  Cuba is involved in the process of deploying Digital TV (DTV).  LACETEL is leading the technology transference process.  Solid steps to Technology Independence. 2/20 II DTV International Forum

3 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Introduction (II) Coding and decodind video. DTV chain. VIDEO SOURCE DIGITAL CODE AND MULTIPLEX DIGITAL MODULATION DIGITAL DEMODULATION DIGITAL DEMULTIPLEX AND DECODE TV SET BROADCAST TRANSMITTER BROADCAST RECEIVER 3/20 II DTV International Forum

4 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Introduction (III) ISO/IEC (H.264/AVC o MPEG-4 Part 10).  Nowadays is the most deployed codec for High Definition TV. 4/20 II DTV International Forum

5 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Introduction (IV)  Mature codec, plenty of scientific documentation, free standard document, free and well organized reference software.  Existence of H.264/AVC analyzer and player softwares. 5/20 II DTV International Forum

6 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE PURPOSE TO DESIGN AND IMPLEMENT AN IDEAL MODEL OF AN H.264/AVC DECODER USING FPGA. 6/20 II DTV International Forum

7 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Deploying (I) Reference library, version 18.4  Software described in C language.  It is the official reference software of the H.264/AVC standard for knowledge and guide. 7/20 II DTV International Forum

8 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Deploying (II) Software compiled in Microsoft Visual Studio. Tested by Elecard 2.1 8/20 II DTV International Forum

9 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Deploying (III) ML507 developlment board, from Xilinx. FPGA Virtex 5. PowerPC embedded microprocesor. 9/20 II DTV International Forum

10 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Deploying (IV)  Modification y optimization of the reference software.  Addtition of read and write features from Compact Flash memory, where are stored the input and output files of the system. 10/20 II DTV International Forum

11 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Deploying (V)  H.264/AVC coded video as input of the decoder model. The process gives as result a decompressed file stored in Compact Flash. SYSTEM INPUT. H.264/AVC CODED VIDEO. MICROPROCESSOR SYSTEM. H.264/AVC DECODER MODEL. SYSTEM OUTPUT. DECOMPRESSED VIDEO IN CbCr FORMAT. 11/20 II DTV International Forum

12 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Deploying (VI) Test of results. Video input consistent with H.264/AVC standard. Elecard 2.1 software. 12/20 II DTV International Forum

13 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Deploying (VII) Test of results. Video ouput played with YUV software viewer. 13/20 II DTV International Forum

14 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Conclusions(I)  The use of embedded microprocessors into FPGA is a way to build an ideal model of an H.264/AVC decoder. 14/20 II DTV International Forum

15 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Conclusions(II)  Reference software written in C is an important part to H.264/AVC standard documentation.  Despite the proposed model is not ready to real time application, it does support future optimizations with solid stepflow. 15/20

16 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Conclusions(III)  The proposed model gives the system the guide to achieve real time process and also become the reference for designing and optimization of internal blocks. 16/20 II DTV International Forum

17 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Recommendations(I)  Use hardware/software co-designs to categorize and optimize those blocks who need basic or fast processing. Redifine each one by C language or HDL designs. 17/20 II DTV International Forum

18 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE Recommendations(II)  Insert timer features for exact time management. Also modules for display decoded frames, like VGA or DVI interfaces. 18/20 II DTV International Forum

19 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE DIGITAL TELEVISION LABORATORY

20 RESEARCH & DEVELOPMENT TELECOMMUNICATION’S INSTITUTE


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