Presentation on theme: "Chapter 1 Microprocessors Based Systems. Introduction List of the devices with microprocessors –Pocket Calculators –Digital Watches –Automatic tellers."— Presentation transcript:
Introduction List of the devices with microprocessors –Pocket Calculators –Digital Watches –Automatic tellers –Smart Telephones –Compact Disk Players –Home Security and Control devices –Realistic video games –Talking dolls and other toys –VCRs –Personal Computers
OBJECTIVE To understand the need of the Microprocessors To understand the hardware architecture of the Microprocessors. To be able to write the software for the hardware architecture. To be able to connect the other hardware with the Microprocessors.
SYSTEM BLOCK DIAGRAM What are the standard elements of the computer. –Memory –Timing –Input/Output device. Similarly Microprocessors should have these standard elements with it.
SYSTEM BLOCK DIAGRAM The other elements depending on the requirement of a particular application we may have: ADC/DAC Interval Timers Math Coprocessors, Complex Interrupt circuitry Speech Synthesizer Video Display and Controllers
SYSTEM BLOCK DIAGRAM TimingCPUMemory PARALLELI/O Serial I/OInterruptCircuitry System Bus 1.Processor Address 2.Data 3.Control Signals
SYSTEM BUS Data Bus –The data consist of 8, 16, 32 bit or more parallel lines. These lines are bidirectional i.e. they go from CPU to memory and vice versa. The data bus is connected in parallel to all the peripherals. The communication between the peripherals and CPU is activated by giving output enable pulse to the peripherals. The output of peripherals are floated when they are not in use.
SYSTEM BUS Address Bus –It is a unidirectional bus. The address bus consist of parallel signal lines. On these lines the CPU sends out the address of the memory location or I/O port that is to be written to or read from. Control Bus –They regulate the activity of the bus. The CPU sends signals on the control bus to enable the output of the addressed memory devices or port devices.
SYSTEM BLOCK DIAGRAM The CPU is the heart of the system It is responsible for executing the instructions that are stored in the memory section. For the future expansion the system bus is commonly made available to the outside world. The devices may be added later to this system bus as the need arises which is an easy interface. All the device communicate with the processor in the tightly coupled configuration.
TIMING SECTION Synchronization Proper operation of all the system hardware. Consist of –Crystal oscillator –Timing circuitry.
MATH COPROCESSORS They are microprocessors in themselves Instruction set consist of simply for: – transferring data –performing complex mathematical operations Advantages are: –Operations at higher clock frequency –Have great precision.
MEMORY Volatile –Looses the information when the power is switched off. RAM ROM –Needed for initialization Non Volatile –Retain the information even after the power is switched off. Cache Memory
Memory Hierarchy Cache Secondary Cache Main Memory Secondary Memory
Communication Serial Communication –Slow in nature –Requires lesser number of lines –Only two wires and a ground wire is needed. Parallel Communication –Faster is nature. –Needs more number of lines
Difference Between the Assembly Language and High Level Language High level languages are abstract. Typically a single high level instruction is translated into several executable machine language instructions. Some early high level languages had a close correspondence between high level instructions and machine language instructions. For example, most of the early COBOL instructions translated into a very obvious and small set of machine instructions. The trend over time has been for high level languages to increase in abstraction. Modern object oriented programming languages are highly abstract (although, interestingly, some key object oriented programming constructs do translate into a very compact set of machine instructions).
Difference Between the Assembly Language and High Level Language Assembly languages are close to a one to one correspondence between symbolic instructions and executable machine codes. Assembly languages also include directives to the assembler, directives to the linker, directives for organizing data space, and macros. Macros can be used to combine several assembly language instructions into a high level language-like construct (as well as other purposes). There are cases where a symbolic instruction is translated into more than one machine instruction. But in general, symbolic assembly language instructions correspond to individual executable machine instructions.
Difference Between the Assembly Language and High Level Language Assembly language is much harder to program than high level languages. The programmer must pay attention to far more detail and must have an intimate knowledge of the processor in use. But high quality hand crafted assembly language programs can run much faster and use much less memory and other resources than a similar program written in a high level language. Speed increases of two to 20 times faster are fairly common, and increases of hundreds of times faster are occasionally possible. Assembly language programming also gives direct access to key machine features essential for implementing certain kinds of low level routines, such as an operating system kernel or microkernel, device drivers, and machine control.
Difference Between the Assembly Language and High Level Language High level programming languages are much easier for less skilled programmers to work in and for semi-technical managers to supervise. High level languages allow faster development times than work in assembly language, even with highly skilled programmers. Development time increases of 10 to 100 times faster are fairly common. Programs written in high level languages (especially object oriented programming languages) are much easier and less expensive to maintain than similar programs written in assembly language (and for a successful software project, the vast majority of the work and expense is in maintenance, not initial development).
Kinds of Processors Complex Instruction Set Computers (CISC) –have a large instruction set, with hardware support for a wide variety of operations. In scientific, engineering, and mathematical operations with hand coded assembly language (and some business applications with hand coded assembly language), CISC processors usually perform the most work in the shortest time. Reduced Instruction Set Computers (RISC) –have a small, compact instruction set. In most business applications and in programs created by compilers from high level language source, RISC processors usually perform the most work in the shortest time. Hybrid processors –are some combination of CISC and RISC approaches, attempting to balance the advantages of each approach. Special purpose processors –are optimized to perform specific functions. Digital signal processors and various kinds of co-processors are the most common kinds of special purpose processors.
HARDWARE AND SOFTWARE REQUIREMENTS Why do we need ROM. Initialization peripherals Initializing the system on the start up Outputting the value of DAC Initializing video memory Setting up LEDs Memory to be tested on power on Watchdog Monitor
SAMPLE PROGRAM HELLO.ASM;staring address of data Org$8000;message character HMSGDC.B“Hello”;end of mesg. marker DC.B0;starting address of program STARTMOVEA.L #HMSG, A3;load A3 with mesg. address TRAP#3;output mesg. TRAP#9;return to command processor ENDSTART;end of source file Hello.ASM List, Object and Hex.
THE SOFTWARE MODEL OF 68000 Eight Data Registers D0-D7 Eight Address RegistersA0-A7 –Two A7 Registers. User Stack Pointer USP Supervisor Stack Pointer SSP Program CounterPC Status RegisterSR All the registers except the SR are 32bits in length.
THE SOFTWARE MODEL OF 68000 This USP and SSP make this processor an ideal for –Multiprogramming –Multiprocessing –Creation of Operating System In SSP mode there will be couple of privileged operations –Stop –Reset If the user tries to execute these commands then the processor causes an interrupt condition. Processor responds to this error condition by entering the supervisor mode and take the appropriate action determined by the software in the routine called the exception handler.
STATUS REGISTER 16 bit SR Lower 8 bits are for the user It contains condition code or Flags –X - Extend –N - Negative –Z - Zero –V - Overflow –C – Carry
STATUS REGISTER The upper 8 bits make up the system byte These bits are not available to the programmer unless the processor is in the supervisor mode Processing State: S –0 – User mode –1 – Supervisor Mode T bit is for tracing or debugging the program. I0 to I2 are for masking the interrupt
FUNCTIONAL DISCRIPTION OF 68000 8, 16, 32 bit data instructions LSB and MSB The upper 8bits will occupy the even memory location The lower 8-bits will occupy odd memory location UDS’ and LDS’ to indicate which portion of the databus contains the information. Big Endian Processor –Stores the MSB in the 1 st location. Little Endian Processor –Stores the LSB in the 1 st location.