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F-14 “Tomcat” Microprocessor Chip Set Ray Holt ©Copyright 1998-2014 Ray M. Holt ALL RIGHTS RESERVED.

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Presentation on theme: "F-14 “Tomcat” Microprocessor Chip Set Ray Holt ©Copyright 1998-2014 Ray M. Holt ALL RIGHTS RESERVED."— Presentation transcript:



3 F-14 “Tomcat” Microprocessor Chip Set Ray Holt ©Copyright Ray M. Holt ALL RIGHTS RESERVED

4 Available Documents First revealed in 1998 (30 year secret) Design notebook (excerpts) This slide show Original design paper – 1971 (approved by IEEE Computer Design Magazine in 1970) “Analysis” paper – 1998 Wall Street Journal article Electronic Business article Smithsonian Museum Air & Space Magazine “From Dust to the Nano Age” Leo Sorge

5 This Talk My Career Experiences after Cal Poly My path to Cal Poly and to the F-14 Engineering of the Microprocessor Chip Set Q & A

6 Career Experiences 1968 – 70 Garrett-AiResearch Corp Aircraft & Space Systems Design Engineer F-14 Central Air Data Computer

7 Career Experiences 1971 – 73 American MicroSystems Integrated Circuit Manufacturer Senior Logic Design Engineer Calculators chips Microprocessors chips (AMI 7200 and 7300)

8 Career Experiences 1974 – 80 Microcomputer Associates, Inc Honeywell/Synertek Corp System manufacturer & Publisher Co-Founder, Vice-President Microcomputer Digest Jolt, Super Jolt, SYM system cards First computer-controlled Pinball “Lucky Dice” First Handheld chess Radio Shack prototype

9 Microcomputer Digest

10 1974 JOLT

11 1975 Super JOLT

12 1976 Super Jolt, RAM, Audio Card

13 1975 SYM-1

14 Bonnie Sullivan, programmer for SYM-1: “I worked on the software for the SYM-1 project, and I can add some details. The software was written by Nelson Edwards and students in Walla Walla. They hand-assembled the 6502 code. There was an option to have the SYM-1 with Microsoft Basic. Bill Gates himself came to see us and provided the Basic. He was arrogant, baby- faced, and he wrote buggy code, then refused to believe that it didn't work. I think he assembled it with macros in a PDP-10 assembler. We would provide him with hardware specs, he would customize Basic, send us the code, we would burn an EPROM, and it wouldn't work. "That's impossible!", he would say, despite the fact that he didn't have the hardware, so he hadn't tested it.

15 1982 US NAVY Robart I

16 Career Experiences 1981 – 83 Digital Optics Corp Optical / Laser Scanner Manufacturer VP Engineering & Manufacturing 3-D Laser Scanner “Indiana Jones and the Last Crusade” “Return of the Jedi” Product won Academy Award for Special Effects

17 Career Experiences Present Cornerstone Computers Owner 2 nd Software Distributor Custom Systems (programming and system integration.) Medical, dental, manufacturers, video stores Business consultant & Trainer Website developer & Host Education Curriculum Developer & Teacher

18 1981 Software Distribution

19 Technology Education in Rural Mississippi Robotics Web Page Design Intro to Logic Design Intro to Computers PowerPoint 80 students 4 locations in MS Ages

20 Engineering & Robotics Competitions 13 th in World Competition. Highest Ranked 1 st Year Team. 2013

21 How Did I Get Cal Poly? Born & Raised in Compton CA Encouraged not to enter engineering All F’s my 1 st year of community college Worked on a garbage dump Decided I had better go back to college Attended the University of Idaho

22 Forestry to Cal Poly University of Idaho Forestry Major & R.O.T.C. Army Ranger Unit Junior ready to graduate Took Physics of Electricity at Dean's request

23 Forestry to Cal Poly Cal Poly Pomona Electronic Engineering Major Tubes to transitors Junior year: took Switching Theory as elective

24 Cal Poly to F-14 Garrett AiResearch Engineering Hired to design amplifiers for aircraft audio Only one in department with computer class Special project: Mechanical – Electronic Computer

25 Microcomputer History 1990's Embedded processors Pentiums 100Mhz – 3Ghz+ 486’s 30Mhz – 100Mhz Mhz – 50Mhz Windows MS Office (Word, PowerPoint, etc.)

26 Microcomputer History 1980’s 286’s 4Mhz – 20Mhz IBM PC introduced (1981) Time “Man of the Year” DOS Operating System Wordstar Word Processor Lotus Spreadsheet

27 Microcomputer History 1970’s Radio Shack TRS Commodore Pet Apple I / KIM / SYM Intel 8080 CPU Microsoft Basic/Altair/Jolt/SYM CP/M Operating System Intel 4004 CPU

28 Microcomputer History 1968 Apollo 7 & 8 Launched Intel Founded IBM 8” Floppy Drive Bill Gates turned 13 F-14 Microprocessor design started

29 Make A New Integrated Circuit Computer From A Electromechanical Computer The Big Challenge

30 F4 Phantom CADC

31 Companies Involved Prime Contractor: Grumman Aircraft SubContractor: Garrett AiResearch Integrated Circuits: American MicroSystems

32 The Team 2 – Computer Logic Designers 3 – High-level Programmers 4 – Analog Designers 1 – Applied Mathematician 1 – Test / Mfg Engineer 3 – Electronic Technicians 2 – Draftsmen 4 – Managers 5 – Integrated Circuit Engineers (American MicroSystems)

33 Started: June 1968 Completed: June st Flight: Dec 21, 1970 Design Time Frame

34 1st Flight December 21, 1970

35 F-14 “Tom Cat” CADC Dual Redundant 2 - computers 2 - power supplies 4 - quartz sensors 2 - sets A/D and D/A

36 Computer (CADC) Design Constraints Size: 40 sq inches for microprocessor Power: 10 watts Cost: $3,000-$5,000 Temperature: -55 to +125 deg C Provide data for control & firing of 6 Phoenix / Sidewinder missiles at the same time Others: Acceleration, mechanical shock, reliability, project schedule

37 F-14 In-Flight Three minute YouTube Video Observe the various positions of the wings. They are 100% computer controlled. Observe the dynamic flow of air across the plane. The computer is constantly correcting for stability. When there is a cloud formation around the plane it is breaking the sound barrier (the Danger Zone)

38 What Is A C.A.D.C.? A Flight Computer to: compute and display – altitude – air speed – vertical speed – mach number – temperature

39 A Flight Computer to: compute and control – wing speed, position, and rate – maneuver flap position – glove vane position – angle of attack correction

40 A Flight Computer to: provide other critical flight information – real-time data to other systems (weapons and communications) – in-flight self-diagnostics – redundant switchover to dual system

41 State-of-the-Art in 1968? The Technology TTL Bipolar - high power MOS logic modules - too many packages LSI - new, not proven

42 CADC Block Diagram

43 Microprocessor Self Test Functions In-Flight Diagnostics – 100% of all connections/data paths – 100% of all ROM bits – 100% non-arithmetic circuits – 98% all arithmetic unit single failures – dual redundant system – pilot notification

44 Required Arithmetic Calculations 6th Order Polynomials F (x) = a 6 x 6 +a 5 x 5 +a 4 x 4 +a 3 x 3 +a 2 x 2 +a 1 x 1 +a 0 x = input from sensors or stored values We implemented using Horner’s Rule F (x) = (- - - ((a 0 x + a 1 ) x + a 2 ) x

45 Microprocessor Data Structure Number System fractional fixed point computation two’s complement arithmetic 20 bit data length (based on flight requirements)

46 Microprocessor Technology high level of integration - P Channel MOS minimum package and lead count lowest possible power mil spec temp range -55C to +125C

47 Microprocessor Design Decisions serial instruction and data transfer distributive instruction command ‘pipeline’ instruction and arithmetic ROM master/slave instructions ROM built-in counter and conditional jump

48 Microprocessor F-14 System Diagram

49 Microprocessor System Timing 375Khz Clock, 2.66 us bit time One word = 20 bit times or 53.3 us Operation time - two words 512 Op times - computational Cycle 18.3 Cycles per second 9370 Op times per second for each computational unit

50 Microprocessor Functional Units Parallel Multiplier Unit (PMU) Parallel Divider Unit (PDU) Special Logic Function (CPU) Data Steering Unit (SLU) Random Access Memory (RAM) Read-Only Memory Unit (ROM)

51 Computational Requirements Req/Sec Max/CU Multiply (20-bit) Divide (20-bit) Add/Sub (20-bit) Limits Comparisons Square Roots 73 * Logical And/Or 26 * IF Transfers Discrete inputs/output A/D and D/A I/O

52 Microprocessor Chip Set PMU Functions 20-bit parallel multiplier three internal storage registers ‘pipelined’ overlap I/O and operation Booth’s multiply algorithm 53.3 μs multiply / 53.3 μs transfer continuous operation


54 Microprocessor Chip Set PDU Functions 20-bit parallel divider three internal storage registers ‘pipelined’ overlap I/O and operation Non-restoring division algorithm 53.3 μs divide / 53.3 μs transfer continuous operation


56 Microprocessor Chip Set CPU Functions logical and arithmetic operations Gray code conversions three internal storage registers ‘pipelined’ overlap I/O and operation 53.3 μs multiply / 53.3 μs transfer 4-bit instruction word


58 Microprocessor Chip Set SLU Functions three channel digital data multiplexer 16 inputs - 3 channels out four inputs combined for arithmetic operations 53.3 μs operation / 53.3 μs command 15-bit instruction word


60 Microprocessor Chip Set RAM Functions sixteen 20-bit static registers random access read-write storage 53.3 μs I/O time 5-bit instruction word


62 Microprocessor Chip Set ROM Functions 2560-bit random access/sequential access fixed memory words x 20-bits can parallel eight ROM’s for 1024 words program counter - cleared / +- increment / hold / external data out / parity out 20-bit instruction word


64 Microprocessor Technology Spec’s CHIP DEVICES SIZE PKG # USED TOTAL PMU x pin PDU x pin CPU x pin SLU x pin RAM x pin ROM x pin TOTAL


66 Microprocessor Instruction Set PMU - continuous - co-processor PDU - continuous - co-processor CPU - 16 instructions SLU - 48 instructions RAM - 32 instructions Executive ROM - 37 instructions TOTAL = 133 instructions

67 Microprocessor Equations - Angle of Attack

68 Microprocessor Numeric Scaling - Angle of Attack

69 Microprocessor Equation Flow - Angle of Attack

70 Microprocessor Program Flow - Angle of Attack

71 Microprocessor Typical Binary Coding Sheet

72 Microprocessor Initial Programming Aids No assembler No compiler No simulator No debugger No hardware prototype

73 Microprocessor Testing/Computer Aids Failure analysis simulation (circuit logic level simulation) Programming simulation (chip level with timing) Card deck for ROM masking Program flow chart Flight test software changes Hardware prototype for real testing

74 Simulator/Debugger Output Values Report

75 ROM Binary Programming Report

76 Program Flowchart Report from Plotter

77 Hardware Prototype of F-14 CADC

78 Dual Quartz Sensors

79 Simulated Pilot Display from CADC

80 General Design Accomplishments 1 st microprocessor chip set 1 st aerospace microprocessor 1 st fly-by-wire flight computer 1 st military microprocessor 1 st production microprocessor 1 st fully integrated chip set microprocessor 1 st 20-bit microprocessor

81 Specific Design Accomplishments 1 st microprocessor with built-in programmed self-test and redundancy 1 st microprocessor in a digital signal (DSP) application 1 st with execution pipeline 1 st with parallel processing 1 st integrated math co-processors 1 st Read-Only Memory (ROM) with a built-in counter

82 1 st Time with F-14 Nov 2012

83 F-14 “Tomcat”



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