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CPU Design. CS252/Culler Lec 1.2 1/22/02 Levels of Representation (61C Review) High Level Language Program Assembly Language Program Machine Language.

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Presentation on theme: "CPU Design. CS252/Culler Lec 1.2 1/22/02 Levels of Representation (61C Review) High Level Language Program Assembly Language Program Machine Language."— Presentation transcript:

1 CPU Design

2 CS252/Culler Lec 1.2 1/22/02 Levels of Representation (61C Review) High Level Language Program Assembly Language Program Machine Language Program Control Signal Specification Compiler Assembler Machine Interpretation temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; lw$15,0($2) lw$16,4($2) sw$16,0($2) sw$15,4($2) °°°° ALUOP[0:3] <= InstReg[9:11] & MASK

3 CS252/Culler Lec 1.3 1/22/02 Execution Cycle Instruction Fetch Instruction Decode Operand Fetch Execute Result Store Next Instruction Obtain instruction from program storage Determine required actions and instruction size Locate and obtain operand data Compute result value or status Deposit results in storage for later use Determine successor instruction

4 4 Edge triggered D Flip-Flop Clk D Q Output changes only on the rising edge of the clock

5 CS252/Culler Lec 1.5 1/22/02 What’s a Clock Cycle? Old days: 10 levels of gates Today: determined by numerous time-of- flight issues + gate delays –clock propagation, wire lengths, drivers Latch or register combinational logic

6 In-Out control

7 Instruction 00

8 ? ??? 00 IR ??? ALU Ctrl +1 PC Out In Beginning, Program & Data in Memory Reset counter, the Machine in a random state …. MAR MDR

9 ??? ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (1)... PC  MAR, Read IR

10 ??? ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (2)... MDR  IR, PC  1 IR AB

11 ALU Ctrl +1 PC Out In MAR MDR Instruction Execute... In  Accu IR AB 102

12 12 JNext instruction: 01

13 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (1)... PC  MAR, Read IR

14 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (2)... MDR  IR, PC  1 IR AB

15 ALU Ctrl +1 PC Out In MAR MDR Instruction Execute... IR[adr]  MAR, Accu  MDR,Write IR AB ACCU

16 16 JNext instruction: 02

17 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (1)... PC  MAR, Read IR

18 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (2)... MDR  IR, PC  1 IR AB

19 ALU Ctrl +1 PC Out In MAR MDR Instruction Execute... In  Accu IR AB 304

20 20 JNext instruction: 03

21 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (1)... PC  MAR, Read IR

22 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (2)... MDR  IR, PC  1 IR AB

23 ALU Ctrl +1 PC Out In MAR MDR IR AB ACCU Instruction Execute... IR[adr]  MAR, Accu  MDR,Write

24 24 JNext instruction: 04

25 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (1)... PC  MAR, Read IR

26 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (2)... MDR  IR, PC  1 IR AB

27 ALU Ctrl +1 PC Out In MAR MDR Instruction Execute (1)... IR[adress]  MAR, Read IR AB ACCU

28 ALU Ctrl +1 PC Out In MAR MDR Instruction Execute (2)... ACCU - MDR  ACCU IR AB ACCU 304

29 29 JNext instruction: 05

30 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (1)... PC  MAR, Read IR

31 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (2)... MDR  IR, PC  1 IR AB

32 ALU Ctrl +1 PC Out In MAR MDR Instruction Execute... (acc ≥ 0  IR[adress]  PC) IR AB ACCU

33 33 JNext instruction: 08

34 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (1)... PC  MAR, Read IR

35 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (2)... MDR  IR, PC  1 IR AB

36 ALU Ctrl +1 PC Out In MAR MDR Instruction Execute... ACCU  OUT IR AB ACCU 202

37 37 JNext instruction: 09

38 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (1)... PC  MAR, Read IR

39 ALU Ctrl +1 PC Out In MAR MDR Instruction Fetch (2)... MDR  IR, PC  1 IR AB

40 ALU Ctrl +1 PC Out In MAR MDR Instruction Execute... HLT IR AB ACCU


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