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Microprocessor and Microcontroller Based Systems Instructor: Eng.Moayed N. EL Mobaied The Islamic University of Gaza Faculty of Engineering Electrical.

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Presentation on theme: "Microprocessor and Microcontroller Based Systems Instructor: Eng.Moayed N. EL Mobaied The Islamic University of Gaza Faculty of Engineering Electrical."— Presentation transcript:

1 Microprocessor and Microcontroller Based Systems Instructor: Eng.Moayed N. EL Mobaied The Islamic University of Gaza Faculty of Engineering Electrical Engineering Department بسم الله الرحمن الرحيم Lecture 4 EELE 4315 — Fall 2010

2 PIC 16F84A Microcontroller: Block diagram The CPU Address for Program Memory Data from Program Memory, carrying instruction word Address for Data Memory Data bus for Data Memory and peripherals Program Memory Data Memory Extra “non- volatile” Data Memory Counter/Timer Peripheral Digital Input/ Output Ports

3 PIC 16F84A Microcontroller: “Flow“ The Instruction word flows here. The word will contain the instruction, and maybe also address and data information Address info. flows here Instruction info flows here The core is the “microprocessor inside the microcontroller”, centred around the ALU. It is interesting to see the path that the instruction takes from program memory. “Literal” data flows along here The Arithmetic Logic Unit The “Working Register”

4 Program Memory and Stack Program Counter 16 Series instructions which invoke the Stack Unimplemented memory space, still addressable by the 13-bit 16F84A program address bus. Program Counter points to locations in program memory The program must start here The Interrupt Service Routine must start here

5 PIC 16F84A Microcontroller: Block diagram SFR

6 Data Memory and Special Function Register Map msb is “bank select bit” (Status register). These are the Special Function Registers, which allow the CPU to interact with the peripherals General purpose memory

7 Interfacing with Peripherals – the Special Function Register Microcontroller Interaction with its Peripherals, via Special Function Register (SFR) and Interrupt  microcontroller peripherals can be configured in software to operate in a number of different modes, to do this certain control data must be sent to them to set them up in the desired way  once in use, there will be data flow between core and peripheral,  there may still be need for further control data,  these needs are commonly met by means of dedicated, memory - mapped registers, sometimes called Special Function Registers,  this approach gives the microcontroller manufacturer great flexibility to extend a microcontroller family – SFRs for new peripherals can easily be located in gaps in the memory map.

8 PIC 16F84A microcontroller modules An Arithmetic Logic Unit (ALU): The ALU is responsible for performing all arithmetic operations such as addition, subtraction and Boolean logical operations, including exclusive-or and bit shifting. Multiplication and division is usually accomplished by repeated use of addition or subtraction, but some devices (such as the PIC17CXX series) have hardware multipliers. The working registers are used by the ALU as temporary "scratchpad“ memory, for example, for holding intermediate results of arithmetic operations.

9 PIC 16F84A microcontroller modules One or more working registers (called accumulators in the past) for temporary storage during computations. A register is a small block of memory, often the size of a byte, where data is stored.

10 PIC 16F84A microcontroller modules Program memory (ROM) and data memory (RAM) A microcontroller needs a memory to store its program in such a way that it will not be lost when the circuit’s power supply is switched off. This type of memory is called nonvolatile and is implemented as Read Only Memory (ROM) because the microcontroller can only read data from it. The initial loading of program data into the ROM is done using a ROM programmer circuit designed specially for the purpose. There are different types of ROM. An EPROM (Erasable Programmable ROM) can be erased in about 15 minutes using ultraviolet light and EPROM-based microcontrollers such as the PIC16C71 have a transparent window for erasing the internal ROM.

11 PIC 16F84A microcontroller modules Program memory (ROM) and data memory (RAM) An EEPROM is an electrically erasable PROM and is a particularly attractive memory technology option as it can be quickly and easily erased and reprogrammed. During program execution, the processor needs memory space where it can temporarily store and retrieve data. This data is stored in a volatile memory known as Random Access Memory (RAM). Information in RAM is lost if power to the memory circuits is removed. A more descriptive term for this type of memory is Read/Write memory, as data can be both written to and read from it.

12 PIC 16F84A microcontroller modules A program counter The program counter is a register used to store the address of the next instruction to be executed. Because the program consists of instructions stored sequentially in program memory, the address of the next instruction is obtained by simply incrementing the number (that is, the address), contained in the program counter.

13 PIC 16F84A microcontroller modules Instruction registers with instruction decoder The instruction register contains the actual binary instruction that needs to be executed. The instruction decoder takes the binary instruction and decodes it to determine what operation the instruction must perform and which data it must use.

14 PIC 16F84A microcontroller modules The control unit The control unit controls the timing and sequencing of all operations necessary to correctly schedule and execute instructions. While an instruction is executing, the next instruction is fetched from the program memory and placed in the instruction register with help from the program counter. The instruction decoder then decodes the instruction and it is executed when the next execute cycle occurs.

15 PIC 16F84A microcontroller modules A stack The stack is an area of memory used to keep track of the contents of the program counter when subroutines are called. When data is written to the stack, it is stored at the ‘top’ of the stack. This operation is referred to as pushing data onto the stack. When data is removed from the top of the stack, the stack is said to be popped.

16 PIC 16F84A microcontroller modules Timer/Counter. The timer/counter module can be used for either timing or counting operations. It can be configured to increment its value via clock pulses originating from the internal clock, or from an external source applied to the pin. Incrementing occurs on either the rising or falling edge of the input signal. The timer register can be written to or read from, increments from a starting value of zero. In addition, there is a programmable prescaler which is simply a programmable divider, implemented using an asynchronous ripple counter, which can be used to divide the timer/counter.

17 PIC 16F84A microcontroller modules Watchdog Timer. A watchdog timer is an internal timer running independently of the system clock. It resets the device in the event of a program or circuit malfunction or if an unknown logical state is encountered. For example, if the program hangs, the watchdog timer will time out and reset the processor.

18 PIC 16F84A microcontroller modules I/O Ports. Ports provide PICs access to the outside world and are mapped to physical pins on the device. In some PICs port pins for I/O ports are multiplexed with alternate functions of peripheral modules. When a peripheral module is enabled, that pin ceases to be a general purpose I/O.

19 PIC 16F84A microcontroller modules PORTA and TRISA Registers PORTA is a 5-bit wide, bi-directional port. The corresponding data direction register is TRISA. Setting a TRISA bit (= 1) will make the corresponding PORTA pin an input (i.e., put the corresponding output driver in a Hi-Impedance mode). Clearing a TRISA bit (= 0) will make the corresponding PORTA pin an output (i.e., put the contents of the output latch on the selected pin). Reading the PORTA register reads the status of the pins, whereas writing to it will write to the port latch. All write operations are read-modify-write operations. Therefore, a write to a port implies that the port pins are read. This value is modified and then written to the port data latch. Pin RA4 is multiplexed with the Timer0 module clock input to become the RA4/T0CKI pin.

20 PIC 16F84A microcontroller modules PORTB and TRISB Registers PORTB is an 8-bit wide, bi-directional port. The corresponding data direction register is TRISB. Setting a TRISB bit (= 1) will make the corresponding PORTB pin an input (i.e., put the corresponding output driver in a Hi-Impedance mode). Clearing a TRISB bit (= 0) will make the corresponding PORTB pin an output (i.e., put the contents of the output latch on the selected pin). Four of PORTB’s pins, B7:RB4, have an interrupt-on change feature. Only pins configured as inputs can cause this interrupt to occur (i.e., any RB7:RB4 pin configured as an output is excluded from the interrupt on-change comparison). The input pins (of RB7:RB4) are compared with the old value latched on the last read of PORTB.

21 PIC 16F84A microcontroller modules

22 STATUS The STATUS register contains the arithmetic status of the ALU, the RESET status and the bank select bit for data memory. As with any register, the STATUS register can be the destination for any instruction. If the STATUS register is the destination for an instruction that affects the Z, DC or C bits, then the write to these three bits is disabled. These bits are set or cleared according to device logic. Furthermore, the TO and PD bits are not writable. Therefore, the result of an instruction with the STATUS register as destination may be different than intended. For example, CLRF STATUS will clear the upper three bits and set the Z bit. This leaves the STATUS register as 000u u1uu (where u = unchanged). Only the BCF, BSF, SWAPF and MOVWF instructions should be used to alter the STATUS register, because these instructions do not affect any status bit.

23 PIC 16F84A microcontroller modules Status Register

24 PIC 16F84A microcontroller modules OPTION Register The OPTION register is a readable and writable register which contains various control bits to configure the TMR0/WDT prescaler, the external INT interrupt, TMR0, and the weak pull-ups on PORTB.

25 PIC 16F84A microcontroller modules Option Register

26 PIC 16F84A microcontroller modules INTCON Register The INTCON register is a readable and writable register that contains the various enable bits for all interrupt sources.

27 PIC 16F84A microcontroller modules Intcon Register

28 PIC 16F84A microcontroller modules Data EEPROM memory The EEPROM data memory is readable and writable during normal operation (full VDD range). This memory is not directly mapped in the register file space. Instead it is indirectly addressed through the Special Function Registers. There are four SFRs used to read and write this memory. These registers are: EECON1 EECON2 (not a physically implemented register) EEDATA EEADR EEDATA holds the 8-bit data for read/write, and EEADR holds the address of the EEPROM location being accessed. PIC16F84A devices have 64 bytes of data EEPROM with an address range from 0h to 3Fh. The EEPROM data memory allows byte read and write. A byte write automatically erases the location and writes the new data (erase before write). The EEPROM data memory is rated for high erase/write cycles. The write time is controlled by an on-chip timer. The write time will vary with voltage and temperature as well as from chip to chip.

29 PIC 16F84A microcontroller modules EEcon1 Register

30 PIC 16F84A microcontroller modules PCL and PCLATH The program counter (PC) specifies the address of the instruction to fetch for execution. The PC is 13 bits wide. The low byte is called the PCL register. This register is readable and writable. The high byte is called the PCH register. This register contains the PC bits and is not directly readable or writable. If the program counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The second cycle is executed as a NOP. All updates to the PCH register go through the PCLATH register.

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