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Slide 1/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Charlie Brej, Jim Garside APT Group Manchester University.

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Presentation on theme: "Slide 1/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Charlie Brej, Jim Garside APT Group Manchester University."— Presentation transcript:

1 Slide 1/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Charlie Brej, Jim Garside APT Group Manchester University

2 Slide 2/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Outline  Asynchronous Logic  DIMS (Delay Insensitive Minterm Synthesis)  Early Output Logic  Guarding  Anti-Tokens  Collisions  Conclusions

3 Slide 3/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Asynchronous Latch RiRo AoAi Latch Req Ack

4 Slide 4/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Asynchronous Pipeline

5 Slide 5/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Asynchronous Pipeline Stall Wait!

6 Slide 6/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Dual-Rail Latch  Dual-Rail  00 = ‘ NULL ’  01 = 0  10 = 1  11 = Illegal  Return to ‘ NULL ’ Ri_0Ro_0 Ao Ai Latch Ri_1Ro_1

7 Slide 7/20IWLS 2003, May 30Early Output Logic with Anti-Tokens DIMS Logic C C C C

8 Slide 8/20IWLS 2003, May 30Early Output Logic with Anti-Tokens DIMS vs Early Output Logic C C C C Size:48 transistors Delay:4 inversions Size:12 transistors Delay:2 inversions

9 Slide 9/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Early Output Logic 0 1 0

10 Slide 10/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Guarding Problem:  Inputs  Late  Unnecessary  Acknowledge before ready Solution:  Validity signal (Vo) RiRo Ao Ai Latch Vo

11 Slide 11/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Early Output Guarding C

12 Slide 12/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Anti-Tokens Don ’ t:  Stall entire stage until late input arrives Do:  Stall the latch instead  Early ‘ Validity ’  Acknowledge before Data

13 Slide 13/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Anti-Token Generation 0 0 C A

14 Slide 14/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Anti-Token Propagation A A A C

15 Slide 15/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Token Pass TTT

16 Slide 16/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Anti-Token Pass AAA

17 Slide 17/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Token Anti-Token collision TTA

18 Slide 18/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Token Anti-Token collision 2 T?A

19 Slide 19/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Dual-Purpose Signals  Arbiter free  Req:  Token Request  Anti-Token Acknowledge  Ack:  Anti-Token Request  Token Acknowledge Req Ack

20 Slide 20/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Conclusions  New, fine-grain, asynchronous pipeline  Faster than DIMS (2x)  Smaller than DIMS (4x)  Lower power than DIMS  Some speed advantages over synchronous designs  Counterflow - no arbitration  Requires some timing assumptions

21 Slide 21/20IWLS 2003, May 30Early Output Logic with Anti-Tokens Timing Hazard example A 0 A 0 C


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