Presentation on theme: "Xilinx Analog Mixed Signal Introductory Overview Note: Agile Mixed Signal is Now Analog Mixed Signal Hello, and welcome to this recorded e-learning."— Presentation transcript:
1Xilinx Analog Mixed Signal Introductory Overview Note: Agile Mixed Signal is Now Analog Mixed Signal Hello, and welcome to this recorded e-learning module for designers targeting Xilinx programmable FPGAs. This module is about Xilinx Agile Mixed Solutions.Xilinx Training
2Welcome This module introduces the Xilinx Agile Mixed Signal Solution Enumerate the benefits of using the Xilinx Agile Mixed signal Solution (AMS)List out some features enabled by the Xilinx Agile Mixed Signal SolutionIdentify the key elements that constitute the Xilinx AMS solutionIdentify some key applications enabled by the Xilinx AMS solutionThis module introduces the Xilinx Agile Mixed Signal Solution enabled by the Xilinx 7 series architecture. This module will also show you some key benefits and features that are enabled by the Xilinx Agile Mixed Signal Solution.In this module we will be looking into the different architectural aspects of the analog functions that enable mixed-signal designs in Xilinx FPGAs.We will also look at some example applications and show how we can apply this technology in certain targeted applications.This module is a part of our Designing with Xilinx AMS course. We recommend that you take the time to attend this course to learn all of the critical design considerations you must make when targeting any FPGA device using the AMS solution.
3Analog-to-Digital Converters – Digitizing the Analog World Why Analog Processing?Traditional FPGA Functionality:Digital Interfacing, Control, & ProcessingStorage&MemoryAnalogToDigitalDigital Control&ProcessingDigitalToAnalogXilinx FPGAs have been delivering solutions for high-performance and high-volume systems for years. The strengths of an FPGA lies is in its configurability, signal processing, and control capability and digital connectivity.We live in an analog world; everything that we see, feel or hear is analog in nature. Many diverse electronic systems designed today are aware of their physical environment and are capable of processing such analog information. The systems might have to interface directly to the real world through sensors to monitor and control the environment. Data converters such as analog-to-digital convertors (ADCs) and digital-to-analog converters (DACs) provide this critical bridge between the digital and analog worldsXilinx FPGAs are now increasingly common in applications that interface with the physical world—industrial automation applications, for example. Other examples include applications that monitor the operating environment to ensure safe and reliable operation—monitoring temperatures and power supply conditions in a communications infrastructure application, for example. Here, the FPGA can deliver the flexible control and signal conditioning necessary to match system requirements or deliver flexible protocol for a variety of I/O standards and memory interfaces.Xilinx has provided the System Monitor capability on our high-end FPGAs for several generations with an eye toward monitoring power and voltage. Our customers demanded more, so we improved the System Monitor by doubling the number of ADCs and improving each ADC’s sample rate by a factor of 10. This updated analog interface is referred to as the Xilinx Analog-to-Digital Converter module, or XADC for short.The Human ExperienceSound, Light, Touch, Smell, TasteMonitor & Controlling Our WorldAnalog SensorsHeat, Light, Pressure, ChemicalNetworking&CommunicationsAnalog-to-Digital Converters – Digitizing the Analog World
4Mixed Signal Design Challenges ADCAnalog Signal ConditioningMeasurementDSPPhoto SensorRTD SensorRPM SensorCurrent & Voltage SensorFPGA or µPA wide range of sensor types are required to measure the physical environment. These sensors produce an electrical output in response to stimuli from the environment—temperature, moisture, and mechanical stress, for example. The output signals from these sensors vary greatly and must be manipulated or conditioned to map the sensor output signal to the input range of the analog-to-digital converter before it can be processed by the system.There is often the need to calibrate (i.e., remove offset and gain errors) the analog signal processing chain and perhaps remove non linearity associated with the sensor itself. While many of these functions are commonly implemented in the analog signal processing chain or sometimes in a microcontroller, they can be more efficiently implemented with the digital signal processing capabilities of FPGAs.This is especially true for high channel counts and where complex filtering is required. Calibration using the FPGA can significantly reduce cost by eliminating components and reducing the PCB footprint of analog circuits. It can also provide a platform that is easily reprogrammed to address a range of sensor and application needs. However, the analog-to-digital converter (ADC) is the key to enabling such an approach and the XADC in 7 series FPGAs provides unique flexibility and functionality beyond that which are typically found in ADCs integrated into microcontroller units (MCUs).7 Series FPGA or Zynq EPPAnalog SensorsXADCDSPUse Programmable Logic to CustomizeControl logicSignal processingCalibrationFlexible Analog InterfaceConfigure analog inputsADC timingChange at any time
5Xilinx Agile Mixed Signal Solution XADC is a high quality and flexible analog interfaceDual 12-bit, 1-Msps ADCsOn-chip sensors17 flexible analog inputsTrack and holds with programmable signal conditioningAgile Mixed Signal (AMS)Using the FPGA programmable logic to customize the XADC and replace other external analog functions; e.g., linearization, calibration, filtering, and DC balancing to improve data conversion resolutionThe 7 series Agile Mixed Signal (AMS) approach now delivers the industry’s most flexible, general-purpose analog interface. The programmable XADC and logic enables customization for a wide variety of applications: from simple control and sequencing to more signal processing-intensive tasks like linearization, calibration, and filtering. The signal processing capabilities of the FPGA can also be leveraged to enhance the performance of the Analog-to-Digital Converters (ADCs) using techniques of oversampling and averaging. This flexibility replaces the need for the diverse catalog of analog devices required today.Whether for complex analog signal conditioning or simple analog monitoring, the Xilinx Agile mixed signal capability is worth looking into for your next application.AMS = Combination of Analog and Programmable Logic
6Lowering System CostSignificant cost and area savings by integrating common analog interface functionalityIntegrates discrete ADC or complex analog subsystemDiscrete analog functions integrated12-bit analog front end covers a wide range of general-purpose analog applicationsThe first and probably the most obvious benefit is that you are reducing the overall cost of the solution.Let’s look at the following figure which illustrates a simple controller board that includes a 4-channel ADC, small microcontroller, and an FPGA. Whether it is a motor control or an energy management system, typically there is a DSP or a microcontroller unit (MCU) that performs the housekeeping functions. The discrete ADC performs an analog-to-digital conversion of the input signal for the MCU to process. Sometimes the ADC is integrated into the DSP or the MCU.Very often, there is an FPGA in the system that performs the network interface or some protocol conversion function. The configurable nature of the FPGA allows you to customize the solution depending on what kind of networking interface or protocol conversion is needed in the system.A single chip solution can be realized using a Xilinx FPGA with the XADC integrated and implementing a soft microprocessor. This brings down the cost and complexity of the overall system. Especially, if you're talking about Artix™ type devices or FPGAs at the $10 price for the applications that we're targeting—it adds a lot of value.The single device solution not only simplifies the Bill of Materials (BOM) and reduces cost but also provides improvements in board area, pin savings, FIT improvement, and better inventory management.Analog InterfacesLower System Cost, Lower Board Cost, Reduced Design Complexity and Inventory Management
7Unique Customization Flexible Analog with Programmable Logic Customized analog beyond off-the-shelf productsImplement simple analog monitoring orComplex analog signal conditioning and processingDigital designers experienced with FPGAs can use the programmable logic to customize the XADC to address the diverse needs for analog signal processing such as application-specific calibration, linearization, and signal processing needs.7 series FPGAs and Zynq™ Extensible Programming Platforms (EPPs) can be programmed to address a wide range of functionality, including complex control and management through a microprocessor, digital signal processing (DSP), and general monitoring and control. The flexibility that the programmable logic offers enables designers to tailor an analog solution that meets the exact needs of their system.Lower Cost, Improved Reliability, and Customization with AMS
8Enhanced Reliability, Safety, and Security Unique on-chip thermal and supply monitoring enhances reliabilityEnhance existing security features like AESUse sensors to detect physical attack / tamperingDiagnostics for hardware debug and verificationChipScope Pro tool support for monitoring thermal and supply informationSecure On-Chip MonitoringThe third advantage is enhanced reliability, safety, and security. Agile Mixed Signal contributes to higher reliability because using fewer devices translates into an improved FIT rate. The interface to the on-chip sensors provides factory-guaranteed measurement accuracy that can be used for built-in, self-test functionality to ensure that equipment maintains operation within thermal limits.The power supply and device temperature information of the chip, including the off-chip signal monitors, can be accessed via the JTAG interface or through the FPGA fabric. These signals can be monitored with the ChipScope™ Pro tool even without instantiating the XADC core in your design. The XADC device operates in a predefined mode (called the default mode) that monitors on-chip temperature and supply voltages.Another security feature that the AMS provides is protection of the FPGA designs from a hack or physical tamper of the system enclosures. This feature may be useful for aerospace and defense or even commercial designers where the FPGA is carrying encrypted or secure information and want to protect their IP from any developed side-channel attack. A side-channel attack is an attempt to hack FPGA designs by physically manipulating the system through temperature and power supply.Designers can prevent such side-channel attacks and physical tampering of the system by using the XADC module. The XADC module can be used to detect the operating conditions outside and put the system in a mode such that it becomes less vulnerable to a hack.JTAGJTAGEasy Access for DebugMonitoring On-Chip Where External Solutions Cannot
9XADC Block Diagram Analog Digital MUX DRP ALARMS Status Registers T/H 17 external analog inputssupport unipolar and differential analog input signalsTrack & hold enables flexible analog inputs and increased throughput rateADC resultsAnalogDigitalALARMSStatusRegistersDIFFERENTIAL ANALOG INPUTST/HADC 1Define XADC operation;initialize with attributesControlRegistersThe XADC is the basic building block that enables agile mixed signal functionality in 7 series FPGAs and Zynq EPPs. The XADC can access up to 17 external analog input channels. There is a single dedicated analog input pair (VP/VN) available on the Xilinx package and the remaining sixteen auxiliary inputs use the dual-purpose I/Os on the FPGA. These FPGA digital I/Os are individually nominated as analog inputs when the XADC is instantiated in a design. The analog input channels are very flexible and support multiple analog input signal types.The XADC also includes a six on-chip sensors that support measurement of the on-chip power supply voltages (five channels) and die temperature (one channel). The on-chip sensors and the external analog inputs are multiplexed and are available to the two ADCs. These ADCs can be configured to sample in continuous or event driven modes.The XADC includes a separate track and hold associated with each ADC, which enables much higher throughput rate. The function of the track and hold circuit is to sample the analog front end and hold its voltage constant during the interval required for the ADC to perform the analog-to-digital conversion. The track and hold circuit performs sampling at a much higher rate than the ADC, thereby improving the overall throughput.The track and hold also contains signal conditioning capability. You can program the input to cope with bipolar or unipolar signals. The analog inputs of the ADC use a differential sampling scheme to reduce the effects of common-mode noise signals. This common-mode rejection improves the ADC performance in noisy digital environments. The differential inputs and the bipolar/unipolar modes provide support for a wide number of sensors. Remember that some analog signal limiting may be necessary to protect the analog inputs on the FPGA.And at the core of the XADC are the two 12 bit, 1 mega sample per second (MSPS) ADCs. You can run the ADCs independently and simultaneously in order to sample two channels at a time. This is particularly useful in motor control applications or any application where you want to preserve the phase relationship between two channels.The ADC conversion data is stored in dedicated registers called status registers. These registers are accessible via the FPGA interconnect using a 16-bit synchronous read and write port called the dynamic reconfiguration port (DRP). The DRP interface can run at extreme rates (as high as 250 MHz) allowing designers to perform customization between conversions if necessary. The ADC conversion data is also accessible via the JTAG. In this case, users are not required to instantiate the XADC. The dedicated interface uses the existing FPGA JTAG infrastructure that can be directly accessed using the ChipScope Pro tool. As discussed earlier, if the XADC is not instantiated in a design, the device operates in a predefined mode (called default mode) that monitors on-chip temperature and supply voltages. XADC operation is user defined by writing to the control registers using either the DRP or JTAG interface. It is also possible to initialize these register contents when the XADC is instantiated in a design using the block attributes.The XADC can generate an alarm signals on the logic outputs when an internal sensor measurement exceeds some user-defined thresholds. The alarms are simultaneously written to the appropriate status registers. If averaging has been enabled for a sensor channel, the averaged value is compared to the Alarm Threshold register contents.MUXOn-ChipSensorsT/HADC 2DRPOn-chip sensors supplies ±1%temperature ±4°CJTAGArbitratorInterconnectOn-chip MUX supportsup to 17 differentialanalog input channels2 x 12 bits1 MS/s2 x 12 Bits1 MS/sDynamic reconfiguration port interface
10XADC attributes initialize the XADC registers (settings) XADC PrimitiveXADC registers / settings can also be accessed at any time via the FPGA fabricXADC block I/OThis is an overview of how the XADC block looks in the Xilinx tools.The XADC block registers can be initialized using the primitive attributes. The registers can also be written at run time via the block I/O (DRP); a soft processor like the MicroBlaze™ processor can be used.Other block I/O include control I/O and status I/O. The analog inputs are also shown.XADC attributes initialize the XADC registers (settings)
11Application Specific or Custom Data Acquisition using FPGA Logic Xilinx Analog-to-Digital Converter (XADC) Dual 12-bit, 1-MSPS ADCs with Flexible Analog InputsTightly coupled to programmable logic of FPGA via register-based interfaceDual 12-bit, 1-Msps analog-to-digital converters:Independent operation possibleADCs carry out 16-bit conversion with digital calibration of offset and gain errorsAdditional precision can be used to implement user linearization and calibration of analog circuitsUser defined conversion rate and sampling timingThe XADC has two 12-bit, 1MSPS ADCs. The dual independent ADCs enable simultaneously sampling on two different channels, thus preserving the phase relationships necessary in applications like motor control where stator current phase information is absolutely critical.Fast samplingAcquisition and conversion time of 1 µsTwo ADCs support simultaneous samplingFlexible timing modes (self and externally triggered sampling modes)Separate track and hold amplifier ensures maximum throughput using multiplexed analog input channelsTwo high accuracy ADCs0.1% measurement accuracy1-MSPS conversion rateApplication Specific or Custom Data Acquisition using FPGA Logic
12Easily Introduce Analog Signals into the Digital Verification Add analog signals forMATLAB or real measurement to digital simulationOne thing that is very useful for the digital designer is the ability to add some analog signals to the simulation when doing verification.The behavioral model will allow signals for a number of sources to be introduced into the simulation—for example, real measurement data for the bench or simulation output data from a tool like the MATLAB®/Simulink® software.
13Target Applications Market Application AMS Function Industrial Data AcquisitionPLCPower ConversionMotor ControlT&MHMILegacy analog interfaceMonitor voltage and current sensors for safety and control of power devices (e.g., motors, DC-DC converters). Power Self Test (POST) for T & M apps. Touch-based interface for HMI. 4-20mA loops.CommunicationsSystem ManagementAnalog Control FunctionsAnti TamperMonitor temperatures and power supplies for reliability & high availability. Also security and anti-tampering. Monitor and control for DC voltage trim—lasers, VCOs, RF PAs, etc.Aerospace & DefenseSecure CommunicationsMunitionsMonitor on-chip temperature and power supplies for anti-tampering purposes (security). Motor control.ConsumerMulti Function PrinterDSLRBroadband AccessMonitor various sensors for temperature, humidity, light, accelerometer, etc. Motor control. Touch-based user interface.AutomotiveInfotainmentInstrument ClusterMonitor voltages, currents, and various sensors—stepper motors, touch interface, safety.
14Custom Signal Processing Simultaneous Sampling of Ia & Ib Motor ControlCustom Signal ProcessingOff load the MCU – Clarke & Park transforms in FPGA fabricAs an example of the benefits of an autonomous processing subsystem, the figureshows an integrated high-performance motor controller based on the XADC, a softcore MicroBlaze microprocessor, DSP blocks, and support logic functions, including pulse width modulation (PWM), counter timers, and serial communications channels.Using a simple application programming interface (API), a central control processorcan issue high-level commands to configure and control the autonomous subsystem.The subsystem controls motor functions independent of the central microprocessor,and reports back status or issues interrupts as appropriate.Separating the motor controller operation through an autonomous solutionencapsulates the solution, making the overall system easier to design, test, andmaintain. This can also lead to lower cost and overall higher system-levelperformance.Simultaneous Sampling of Ia & IbAccommodate current senor output unipolar / differentialSynchronize ADC sampling to PWM
15Resistive Touch Screen True Differential Sampling / Unipolar ModeMeasure excitation voltage from digital outputMeasure touch voltageControl & ProcessingTouch algorithm implemented in FPGA logicThe popularity of touch-sensing interfaces has been rapidly increasing, especiallywith the emergence of smart phones and tablets. While there are multiple technologiesused to manage touch sensing, one of the most popular methods is resistive touch.Several manufacturers produce stand-alone devices designed specifically to addresstouch-screen interfacing. The majority of these devices are designed to communicatewith an external microcontroller or processor. The figure shows a simplified 8-wireresistive touch screen that has been implemented using an Artix-7 FPGA. In thisexample, the touch sensor and microprocessor are integrated, reducing device countand lowering overall system cost.Artix-7 FPGAs and Zynq-7000 EPPs are well suited for implementing both resistiveand capacitive sensor interfaces. Using the XADC block, the Xilinx devices candirectly measure sensor voltages. The FPGA then processes the samples, compares thevalues to thresholds, and manages the touch or touches. In the figure, only a smallamount of FPGA fabric resources are required, and even the smallest, low-cost Artix-7device has plenty of resources remaining for many additional functions.Beyond the benefits of system-level integration, high-performance FPGA logicallows for fine-tuning of touch-screen processing algorithms, which can quicklyexceed the processing capabilities of most stand-alone touch-screen devices. Thisexpanded processing capability, in turn, can allow for a superior human-machineinterface that is optimized to the application needs or the characteristics of thetouch-screen materials.
16Resistive Touch Screen or EPOS solution Use one ADC required to implement the touch interfaceSecond ADC can be used to monitor on-chip temperature and voltageAnti Tamper / SecurityTouchScreenEPOS
17Custom Analog Sensor Compensation in the Digital Domain Analog InputsAccommodate various sensor typesDifferential / unipolar / bipolarCustom LogicLinearization and calibration of sensors16-bit ConversionMore precision for digital correction
18Implementing Sensor Compensation Add customized algorithms to compensate for analog effectsComponent tolerances, non linear sensors, thermal drift, etc.Enhance your data acquisition designsCompensation is typically done in software but now can be added to the data acquisition sub systemAnalog designers can use tools like MATLAB / Simulink software to develop compensation algorithms and directly target FPGA implementationNo FPGA design / HDL knowledge needed
197 Series FPGAs Full Digital Customization Lowest Powerand CostIndustry’s Best Price-PerformanceIndustry’s Highest System PerformanceMaximum CapabilityLogic Cell Range8K – 350K70K – 480K330K – 2,000KBlock RAM19 Mb34 Mb85 MbDSP Slices1,0401,9205,280Peak DSP Perf. (symmetrical FIR)1,129 GMACS2,450 GMACs6,737 GMACSTransceivers163296Transceiver Performance6.6 Gb/s12.5 Gb/s12.5 Gb/s, 13.1 Gb/s, Gb/sMemory Performance1,066 Mb/s1,866 Mb/sPCIe InterfaceGen2x4Gen2x8Gen3x8I/O Pins6005001,200I/O Voltages1.2V, 1.35V, 1.5V, 1.8V, 2.5V, 3.3VAgile Mixed Signal is available in all families and all devices.28nm technology delivers a wide range of capability. This chart shows the expansive capability and resources of the 28nm families.More important to the non-FPGA familiar engineers, this is an incredible amount of resources that can be leveraged to perform the signal conditioning, processing, and digital networking required for systems.Logic, RAM, DSP, high-speed transceivers, memory, and homogeneous I/O support many standards.Whether you are providing system monitoring functions in high-performance communication systems or implementing low-cost integrated sensor applications, the 7 series FPGAs have a solution to reduce system cost, allow customization for the application, and enhance the reliability, safety, and security of the system.With this we have covered what the XADC block is; let’s look at more detail an the applications.============================================================Available are resources and a collection of IP and tools that deliver a level of digital customization far beyond what is possible using MCU / ASSPs.
20XADC-AXI IP for ZynQ-7000 EPP and MicroBlaze Processor
22Lower Cost, Customization, and Enhanced Reliability Agile Mixed Signal (AMS) Technology Flexible Analog with Programmable LogicCustomized analog beyond off-the-shelf productsCustom monitoringComplex analog data acquisition and processingSignificant cost and area savings by integrating analog functionalityDiscrete analog functions integrated12-bit, 1-Msps ADC covers a wide range of monitoring and data acquisition requirementsEnhanced reliability, safety, and securityUnique on-chip temperature & supply sensorsDetection of physical tamperLowering cost while increasing monitoring capability of physical operating environment.Customization …Enhanced reliability for broadcast and communications infrastructure.New safety features for automation and transportation applications.Improved security for aerospace and defense.Better debug and diagnostic features:Easy-to-access power supply and device temperature informationAbility to monitor the off-chip environment for qualification and testingPower monitoring and characterization during developmentLower Cost, Customization, and Enhanced Reliability
23Where Can I Learn More? Learn more at www.xilinx.com/AMS Agile Mixed Signal white paper (WP392)XADC User Guide (UG480)Watch more videos of Xilinx AMSVisitApplication examplesNew 7 series documentationXilinx training coursesXilinx tools and FPGA architecture coursesHardware description language courses7 series design coursesBasic FPGA architecture, basic HDL coding techniques, and other free VideosPage 23