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VGA Text Mode An introduction to font selection and to reprogramming of the Character Generator ram.

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Presentation on theme: "VGA Text Mode An introduction to font selection and to reprogramming of the Character Generator ram."— Presentation transcript:

1 VGA Text Mode An introduction to font selection and to reprogramming of the Character Generator ram

2 alphanumeric information Most early PC programs weren’t graphical Screen was similar to a typewriter’s output Used only a limited set of character-images: –letters, numerals, and punctuation symbols Hardware can efficiently render such glyphs VGA can emulate the MDA/EGA text modes: –mode 1: emulates EGA 40x25 text (320x200 pixels) –mode 3: emulates EGA 80x25 text (640x400 pixels) –mode 7: emulates MDA 80x25 text (720x350 pixels)

3 Font images in ROM VGA has built-in firmware (ROM-BIOS) Both code and data are provided in ROM VGA’s ROM is normally at 0x000C0000 Can be addressed by CPU in ‘real-mode’ VGA ROM includes character glyph tables –8x8 character-set is used with mode 1 –8x16 character-set is used with mode 3 –8x14 character-set is used with mode 7

4 A character-glyph example Here’s a sample 8x8 character glyph (‘A’): This glyph can be represented as an array of 8 bytes: 0x00, 0x38, 0x6C, 0xC6, 0xFE, 0xC6, 0x00, 0x00

5 VGA Timer-Sequencer A ‘character table’ is copied into VRAM Glyphs organized as an array of bitmaps Array holds 256 images (32 bytes/image) – Table-size: 256x32 = 8K bytes (= 0x2000) The ascii-codes serve as array-indexes: –Example: ‘A’ has ascii-code 0x41 (=65) Sequencer hardware accesses these images Dedicated area of VRAM is used (plane 2) Planes 0 and 1 are used as a text frame-buffer

6 Arrangement of VRAM planes plane 0 plane 1 plane 2 plane 3 Not used (masked) Holds the character glyph table(s) Stores color attribute-bytes for displayed text Stores ASCII- codes for the currently displayed text CPU can read/write only to planes 0 and 1 (using odd/even addressing mode)

7 multiple fonts supported Plane 2 is the Character Generator’s ram Enough room for eight separate tables: –8 x 8K = 64K Two tables can be in use simultaneously Tables must start at prescribed offsets: –Table 0: 0x0000Table 4: 0x2000 –Table 1: 0x4000Table 5: 0x6000 –Table 2: 0x8000Table 6: 0xA000 –Table 3: 0xC000Table 7: 0xE000

8 Text color ‘attributes’ In text mode, the picture-elements consist of character images, shown in two colors: –Foreground color, and Background color Character colors individually programmed A byte-pair in VRAM selects the bit-image (ascii code) and color-pair (attribute byte) All colors come from a palette of 16 But the color palette is ‘programmable’

9 Layout for an ‘attribute’ byte RGBRB G Foreground ColorBackground Color Bit function is Programmable: Default is “EnableBlinking” Bit function is programmable Default is “EnableIntensity”

10 VGA Sequencer Registers Five registers comprise VGA Sequencer: –index 0: Reset register –index 1: Clocking Mode register –index 2: Map Mask register –index 3: Character Map Select register –index 4: Memory Mode register All accessed via i/o ports 0x3C4-0x3C5 using “multiplexing” scheme (index/data)

11 Access to character ram In text modes, CPU can’t access Plane 2 Plane 2 gets accessed by the Sequencer Sequencer performs a ‘glyph-lookup’ for each ascii code stored by CPU in Plane 0 Both Sequencer and Graphics Controller must be suitably reprogrammed in order for the CPU to a read or write to Plane 2 Six VGA registers are involved in that step

12 Reset (index 0) Synchronous Reset bit (bit 1) 1 = normal sequencer operation 0 = initiate a synchronous reset Asynchronous Reset bit (bit 0) 1 = normal sequencer operation 0 = initiate an asynchronous reset A synchronous reset is used in advance of reprogramming the Clocking Mode register (or the Clock Select field in the VGA’s Miscellaneous Output register) Halts VRAM refresh cycles and clears VRAM contents

13 Map Mask (index 2) Enables or disables CPU’s ability to access specific memory planes 1 = write enable, 0 = write disable Plane 3 Plane 2 Plane 1 Plane 0

14 Memory Mode (index 4) “Chain-4” Addressing 1 = enabled 0 = disabled i.e., each plane holds every fourth byte “Odd/Even” Addressing 1 = disabled 0 = enabled It’s used for text modes Extended Memory (>64K) 1 = present, 0 = absent (For EGA only) 1= text 0 = graphics

15 GC: Miscellaneous (index 6) Memory Map Odd/ Even enable G/A Memory Map options: 00 = 0xA0000 (128K) 01 = 0xA0000 (64K) 10 = 0xB0000 (64K) 11 = 0xB8000 (32K) 1 = use Odd/Even Addressing 0 = use Sequential Addressing 1 = Disable the character generator( graphics mode) 0 = Enable the character generator (use “text mode”) Graphics Controller registers are accessed via i/o ports 0x3CE/0x3CF

16 GC: Mode (index 5) 256 colors SHIFT ODD/ EVEN Read Mode Write Mode (0, 1, 2, 3) = cpu data at odd addresses is mapped to odd-numbered planes, cpu data at even addresses gets mapped to even-numbered planes 0 = cpu addressing is sequential NOT: This affects only the Graphics Controller. The Sequencer needs to be programmed separately to match This affects the VGA Attribute Controller’s operation (text color: foreground color and background color) Should be 1 for text Should be 0 for text mode

17 How to modify character ram Algorithm: –Reset the VGA for accessing Plane 2 –Then CPU reads or modifies Plane 2 –Reset the VGA for accessing Planes 0, 1 Acknowledgement: –Author Richard Wilton described this process in his classic book “Programmer’s Guide to PC Video Systems (2 nd Edition)”

18 Details for this ‘prolog’ outw( 0x0100, 0x3C4 ); // do a synch. reset outw( 0x0402, 0x3C4); // write Plane 2 only outw( 0x0704, 0x3C4 ); // sequential access outw( 0x0300, 0x3C4 ); // end the reset outw( 0x0204, 0x3CE ); // read Plane 2 only outw( 0x0005, 0x3CE ); // disable odd/even outw( 0x0006, 0x3CE ); // VRAM at 0xA0000

19 Details for the ‘epilog’ outw( 0x0100, 0x3C4 ); // do a synch. reset outw( 0x0302, 0x3C4); // write Planes 0 & 1 outw( 0x0304, 0x3C4 ); // odd/even access outw( 0x0300, 0x3C4 ); // end the reset outw( 0x0004, 0x3CE ); // restore to ‘default’ outw( 0x1005, 0x3CE ); // resume odd/even outw( 0x0E06, 0x3CE );// VRAM at 0xB8000

20 Some Class Demos ‘newzero.cpp’: installs new glyph for ‘0’ ‘romfonts.cpp’: finds ROM glyph-tables ‘backward.cpp’: flips character images! ‘vm86blue.cpp’: changes text’s attribute

21 Algorithm for ‘backward.cpp’ for (int i = 0; i < 8192; i++) { unsigned charorig, revs = 0; orig = vram[ i ]; for (int j = 0; j < 8; j++) if ( orig & (1< { "@context": "http://schema.org", "@type": "ImageObject", "contentUrl": "http://images.slideplayer.com/3888880/13/slides/slide_20.jpg", "name": "Algorithm for ‘backward.cpp’ for (int i = 0; i < 8192; i++) { unsigned charorig, revs = 0; orig = vram[ i ]; for (int j = 0; j < 8; j++) if ( orig & (1<

22 Attribute Controller (0x3C0) Color Plane Enable (index 18) Enables or disables color-palette address-bit from specific planes 1 = plane enable, 0 = place disable Plane 3 Plane 2 Plane 1 Plane 0 NOTE: Writing to Attribute Controller’s registers requires sending two bytes in succession to same port-address (0x3C0); reset internal flip-flop first by Inputting from port 0x3DA; output 0x20 to port 0x3C0 as a concluding step.

23 In-Class Exercises Exercise #1: Design a new image for ‘A’ Exercise #2: Draw all text upside-down Exercise #3: Draw ‘yellow-on-green’ text Exercise #4: Draw fonts vertically aligned


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