Download presentation

Presentation is loading. Please wait.

Published byCiara Haight Modified over 2 years ago

1
Design & Co-design of Embedded Systems Distributed System Co-synthesis (1) Maziar Goudarzi

2
Fall 2005 Design & Co-design of Embedded Systems2 Today Program zIntroduction zPreliminaries zHardware/Software Partitioning zDistributed System Co-Synthesis (part 1) References: Wayne Wolf, “Hardware/Software Co-Synthesis Algorithms,” Chapter 2, Hardware/Software Co-Design: Principles and Practice, Eds: J. Staunstrup, W. Wolf, Kluwer Academic Publishers, 1997. S. Prakash, A. Parker, “Synthesis of Application-Specific Multiprocessor Architectures,” ACM/IEEE Design Automation Conference, 1991.

3
Fall 2005 Design & Co-design of Embedded Systems3 Topics zIntroduction zA Integer Linear Programming Model zA Heuristic Algorithm (next session) yOn ordinary task graphs yOn an Object-Oriented model

4
Fall 2005 Design & Co-design of Embedded Systems4 Introduction to Distributed System Co-Syn. zDoes not use an architectural template zInstead, creates a multiprocessor architecture during co-synthesis yUsually heterogeneous multiprocessor in xProcessing Elements xCommunication Channels xTopologies zLess emphasis on the design of ASICs zMore emphasis on the design of multiprocessor topology

5
Fall 2005 Design & Co-design of Embedded Systems5 Introduction to Distrib. Sys. CoSyn. (cont’d) zVery common in practice yA decade ago: xSpecially large CPU + small microcontrollers + small ASICs ySpecifically today: xMPSoC: Multiprocessor System-on-Chip

6
Co-Synthesis Algorithms: Distributed System Co-Synthesis Integer Linear Programming Model

7
Fall 2005 Design & Co-design of Embedded Systems7 ILP Model zIntroduction yLinear Programming (LP): xMinimizing/maximizing a Linear target function Subject to a set of Linear constraints xCurrent algorithms: Do find the optimal solution, or else the problem is not feasible at all. xExample: Knapsack problem yInteger Linear Programming (ILP) xInteger-solution counterpart of LP xExample: Knapsack problem with integer-solution constraint

8
Fall 2005 Design & Co-design of Embedded Systems8 ILP Model (cont’d) zIntroduction (cont’d) yMixed Integer Linear Programming (MILP) xOne (or more) non-integer variables included y0-1 Integer Linear Programming (0-1 ILP) xOnly binary variables (can only be 0 or 1) yCurrent algorithms: xAbsolute optimal solution is found Takes much CPU time Only feasible for fairly small problems

9
Fall 2005 Design & Co-design of Embedded Systems9 Prakash-Parker ILP Model zBy Prakash and Parker, 1991 yDeveloped an ILP formulation xUsed general ILP solvers to solve it yInputs to the algorithm xSingle-rate task graph xTechnology model for the PEs, communication channels, and processes’ execution characteristics on them yTarget function xMinimize system implementation cost yConstraints xDescribe the requirements of the system

10
Fall 2005 Design & Co-design of Embedded Systems10 Prakash-Parker ILP Model (cont’d) zAlgorithm classification criteria yInput Model xSingle-rate task graph yTarget Architecture xDistributed multiprocessor yQuantum xProcesses of the task graph yCost Estimation xBased on technology models provided to the algorithm xRepresented as target function of the ILP

11
Fall 2005 Design & Co-design of Embedded Systems11 Prakash-Parker ILP Model (cont’d) zAlgorithm classification criteria (cont’d) yPerformance Estimation xBased on technology models provided to the algorithm yScheduling, Allocation xEmbedded in the ILP formulation constraints yAlgorithm details xTarget Function Minimize cost (or maximize performance) xSets of Constraints Allocation (PE and communication links) Scheduling (Processes on PEs, and communications on links)

12
Fall 2005 Design & Co-design of Embedded Systems12 Prakash-Parker MILP Model: Input Task Graph zNodes yS a :Process a zEdges yData communication yi a,b :input b to process a yo a,c : output c from process a zDiffers from DFG yS a may start before all its inputs are ready yS a may produce outputs before finishing yIntroduces: f R (i a,b ), f A (o a,c )

13
Fall 2005 Design & Co-design of Embedded Systems13 Prakash-Parker MILP Model: Output Multiprocessor Arch. zNodes yP i : Processor i zEdges yl i,j : Link between processor i and j yPoint-to-point comm., but extendable to bus, multi-hop and other styles

14
Fall 2005 Design & Co-design of Embedded Systems14 Prakash-Parker MILP Model: Given Inputs zP a : set of all processors capable of running S a zD ps (P t, S a ): Exec. time of S a if run on a processor of type P t zV a1, a2 : volume of data transferred from S a1 to S a2 yRemote transfer: if S a1 and S a2 are mapped to different processors yLocal transfer: if both mapped to the same processor zComm. cost depends on the transfer being local/remote yD CL : cost of local transfer of unit volume of data yD CR : cost of remote transfer of unit volume of data xWaiting time for the channel is not included in D CR

15
Fall 2005 Design & Co-design of Embedded Systems15 Prakash-Parker MILP Model: Given Inputs (cont’d) zSet P: set of all available processors yP= a P a zC d : Cost of processor p d P zC L : Cost of a comm. link between two processors

16
Fall 2005 Design & Co-design of Embedded Systems16 Prakash-Parker MILP Model: Variables zTiming variables + binary variables zTiming variables yreal-valued yData availability timing variables xT IA (i a,b ): input availability time xT OA (o a,c ): output availability time ySubtask execution timing variables xT SS (S a ): start-time of sub-task S a xT SE (S a ): end-time of sub-task S a

17
Fall 2005 Design & Co-design of Embedded Systems17 Prakash-Parker MILP Model: Variables (cont’d) zTiming variables (cont’d) yData transfer timing variables xT CS (i a,b ): start-time of comm. i a,b xT CE (i a,b ): end-time of comm. i a,b zBinary variables ySubtask-to-processor mapping variables x d,a =1 : S a is mapped to P d yData-transfer-type variables x a1,a2 =1 : comm. between S a1, S a2 is a remote transfer

18
Fall 2005 Design & Co-design of Embedded Systems18 Prakash-Parker MILP Model: Constraints zAllocation yProcessor-selection constraints xEach process must be assigned to one and only one (not more, not less) processor yData-transfer type constraints xEach communication must be either local or multi-hop. But not both, and not neither

19
Fall 2005 Design & Co-design of Embedded Systems19 Prakash-Parker MILP Model: Constraints (cont’d) zScheduling yInput-availability constraints xData cannot be used by the sink process until after produced by the source process yOutput-availability constraints xData must obey the fractional output generation parameters

20
Fall 2005 Design & Co-design of Embedded Systems20 Prakash-Parker MILP Model: Constraints (cont’d) zScheduling (cont’d) ySubtask-execution-start constraints xRelation between availability of inputs and start- time of the process (subtask) must be satisfied ySubtask-execution-end constraints xProcess finish-time depends on its start-time and the PE on which it executes

21
Fall 2005 Design & Co-design of Embedded Systems21 Prakash-Parker MILP Model: Constraints (cont’d) zScheduling (cont’d) yData-transfer-start constraints xData-transfer cannot be started unless the corresponding output is already produced yData-transfer-end constraints xLocal/remote transfer latencies must be considered

22
Fall 2005 Design & Co-design of Embedded Systems22 Prakash-Parker MILP Model: Constraints (cont’d) zScheduling- Proper sharing of resources yDefine an overlap function yProcessor-usage-exclusion xProcesses on a single PE must not execute simultaneously yCommunication-usage-exclusion xMultiple comm. must not be scheduled on the same link simultaneously

23
Fall 2005 Design & Co-design of Embedded Systems23 Prakash-Parker MILP Model: Objective (Target) Function zAlternative 1: yMaximize performance Maximize T F yTo ensure T F is the end-time of entire task

24
Fall 2005 Design & Co-design of Embedded Systems24 Prakash-Parker MILP Model: Objective Function (cont’d) zAlternative 2: yMinimize cost xTwo new binary variables: Processor-selection variable ( d ) Comm.-link-selection variable ( d1,d2 )

25
Fall 2005 Design & Co-design of Embedded Systems25 Prakash-Parker MILP Model (cont’d) zMore constraints can be added at wish zNon-linear constraints were linearized zThe MILP formulation solved using Bozo (Branch-and-Bound MILP solver using XMP linear-programming package)

26
Fall 2005 Design & Co-design of Embedded Systems26 Prakash-Parker MILP Model: Experimental Results zExample 1: 4 nodes in task graph yOther assumptions xV a1,a2 =1 xD CL =0 xD CR =1 xC L =1

27
Fall 2005 Design & Co-design of Embedded Systems27 Prakash-Parker MILP Model: Experimental Results (cont’d) zExample 1 (cont’d) y93 variables (21 timing, 72 binary) y174 constraints zCPU: Solbourne Series5e/900 (Similar to Sun SPARCsystem 4/490) + 128 MB memory zCost as constraint. Performance is optimized.

28
Fall 2005 Design & Co-design of Embedded Systems28 Prakash-Parker MILP Model: Experimental Results (cont’d) zExample 2: 9 nodes y272 variables x47 timing, 225 binary y1081 constraints

29
Fall 2005 Design & Co-design of Embedded Systems29 Prakash-Parker MILP Model: Experimental Results (cont’d) zExample 2 (cont’d)

30
Fall 2005 Design & Co-design of Embedded Systems30 Prakash-Parker MILP Model: Experimental Results (cont’d) zExperimental Results yApplied only to relatively small problems xReason: use of general ILP solvers xTheir largest task graph: 9 processes Took 6000 CPU minutes on an unspecified processor ySignificance of the work xDid Achieve precisely optimal solutions on those examples which they could solve xUsed as benchmarks for heuristic co-synthesis algorithms

31
Fall 2005 Design & Co-design of Embedded Systems31 What we learned today zDistributed System Co-Synthesis: yThe other broad category of co-synthesis algorithms yGeneral terms yOne famous instance: Integer Linear Programming [Prakash-Parker 91]

Similar presentations

OK

HW/SW Co-Synthesis of Dynamically Reconfigurable Embedded Systems HW/SW Partitioning and Scheduling Algorithms.

HW/SW Co-Synthesis of Dynamically Reconfigurable Embedded Systems HW/SW Partitioning and Scheduling Algorithms.

© 2018 SlidePlayer.com Inc.

All rights reserved.

Ads by Google

Ppt on networking related topics of psychology Ppt on internet services download Ppt on 21st century skills in education Download ppt on acids bases and salts for class 10 Ppt on airbag in cars Ppt on osi model and tcp ip Free ppt on crop production and management Ppt on porter's five forces model Ppt on aluminium form work Ppt on area of parallelogram and triangles in geometry