Presentation on theme: "Using Eagle for PCB design"— Presentation transcript:
1Using Eagle for PCB design Part 2, high speed mixed signal design techniquesMike TwiegCase Western Reserve UniversityNovember 21st 2011
2OverviewWrap up from part 1: Exporting design files from Eagle, and submitting files for manufacturingRecommendations on SMT packagesHigh speed signal propagationMixed signal layout design4 layer design techniques
3Design finishing checklist Make sure the design rule checker (DRC) settings match the design for manufacture (DFM) rules for the manufacturerNo DRC errors (unless you are sure they are benign)No outstanding ERC warnings. No design inconsistenciesNo unrouted tracesTurn off all layers except “unrouted,” you should see nothingIf you intend to have a silkscreen printed:You can export any layers to the silkscreen during the CAM processCommon layers: Names, values, place, docu
4Gerber filesGerber is a common CAD format which describes images using vectors Industry standard is now RS-274X (extended Gerber format) Several Gerber files are needed, each having info from multiple layers in your layout editor Information on drill hits is not included in Gerber files. Excellon files contain drill coordinates and sizes.
5The CAM processorThe CAM processor is used to export the Gerber and Excellon filesOpen the CAM processor through the layout toolbarThe CAM uses job files to perform specific tasksExport Gerber files with gerb274x.camExport Excellon drill file with excellon.cam
6Exporting Gerber files Each tab is a different Gerber file to be generatedWe highlight which layers in the layout editor are exported to each Gerber fileEagle does most of the work for usFor two layer designs, we should only need to choose which layers to export to the silkscreen(s). Usually dimension, place, value, and/or docu layers.Demo exporting gerbersMake sure all the layers you want to export are enabled in the layout editor!!
7Exporting Excellon drill file Now open up the job excellon.camExporting the Excellon file is even easier than the Gerber filesUse default options, unless you really know what you are doing!Demo exporting gerbersMake sure all the layers you want to export are enabled in the layout editor!!
8Preparing design files After running the gerb274x and excellon job files, you should end up with up to 9 files total with the following extensionsFilename.cmp (top copper layer)Filename.sol (bottom copper layer)Filename.stc (top soldermask layer)Filename.sts (bottomsoldermask layer)Filename.plc (top silkscreen layer)Filename.pls (bottom silkscreen layer)Filename.drd (excellon drill file)Filename.dri (info on drill toolset – not needed)Filename.gpi (general board info – not needed)Rename each file with its specific function, and put them all in one ZIP archiveShow files
9Previewing Gerber files If you want to examine your Gerber files, you can use Pentalogix Viewmate. The free version allows you to easily view, but not edit, gerber files.Demo exporting gerbersHint: if your drill data looks “exploded” when imported, check the settings on leading/trailing zeros
10Submitting files for fabrication The steps for submitting files will depend heavily on the manufacturer It is highly recommended that you first use the manufacturer’s DFM (Design for Manufacturing) checker to check that your design conforms to their capabilities If you don’t pass their DFM checker, then you must change your DRC rules to be consistent We will be using Advanced Circuits as an example
11Using Advanced Circuits First use the DFM checker at freedfm.comWhen submitting the files for a DFM check, you will upload the zip file with your designYou must tell the DFM checker which file corresponds to which layer or functionYou must also tell it some specifications of the design (number or layers, size, etc)Submit the files and wait for results via …If you pass the DFM checker, you may then submit the design for fabricationThe process for ordering boards is almost identical to using the DFM checker, plus shipping and billing informationShow DFM checker
12Advanced circuits free DFM checker Show DFM checker
14Using the DFM checkerAfter submitting, you should receive an automated analysis from freeDFM.com, which includes two things of importance:Plots layer review, which shows you PDF images of each layerAny DFM errors found. All “show stoppers” should be fixed. Potential problems can often be left alone (especially ones relating to silkscreen layers)If you pass the DFM check, then you can order the board for real. The process for ordering is almost exactly the same as for the DFM check.Show DFM checker
16Leaded IC packages 0.5-0.65mm (not too bad) 0.4-0.5mm (pretty hard) BGA (death is certain)QFNShow DFM checkerDFNMany varietiesLFCSP
17Two terminal packagesFor resistors/capacitors and inductors, 0805 is a good compromise between difficulty and density: For diodes, SOD123 and SOD323 are good choices: Often larger packages are needed in order to dissipate enough power or store more energy. Pay attention to component ratings!Show DFM checker
18High speed layout techniques Special care must be taken when designing PCBs for high speed digital communication and analog systemsThese techniques apply well to signals in the regime where transmission line effects are still negligible50mbps for digital data signals, 100MHz for analogRemember, digital signals have bandwidths far above their baud rates!Normally care about up to 5th-7th harmonics for data signals, 7th-9th harmonics for clock signals!First we look at how to preserve intentional signalsShow DFM checker
19High speed signal propagation All high speed signals should be adjacent to at least one reference plane At high frequencies, currents in traces will return in any adjacent planesShow DFM checkerCross section of microstrip traceCross section of stripline trace
20Return current pathsExample: one microstrip trace with a source and a load?Show DFM checker
21Return current pathsAt high frequencies, return currents want to form smallest loops Therefore they try to run underneath the signal tracesShow DFM checkerCurrent distributions for high speed microstrip trace
22Return current pathsReturn currents can be interrupted by split reference planesShow DFM checkerThese large current loops will cause distortion and emit additional EMI!
23Bypass capacitorsBypass capacitors are critical for keeping low loop areas and low impedances at high frequenciesShow DFM checker
24Bypass capacitor selection For bypass caps to be effective:Should be placed as close to the IC supply pins as possibleUse at least one per ICCapacitors are not perfect: self resonanceCan deal with self resonance by using several capacitors in parallel of different sizesSmaller packages will have lower ESL, higher SRFShow DFM checker
25Stitching capacitorsCan bridge plane splits with capacitors, allowing return currents to passShow DFM checkerThis will reduce isolation between the two planes at HF. This is not wise, especially when crossing to or from analog partitions!
26Signals changing layers Sometimes it is necessary to have a signal change layers with a via When this is done, the return current also changes layers! Need to provide a good path for the return current between layersUse vias to locally connect the two planesThis only works when those two planes are actually the same potential!!Show DFM checker
27Signals changing layers When changing layers AND changing reference planes, we cannot use a via for return currents This is often the case with 4 layer board stackups (signal, GND, Vs, signal) We can use stitching caps to improve return currents Even so, this is a mess and is not suitable for very high speeds… Simply put, high speed signals should not change reference planes!Show DFM checker
28Differential signaling Differential signals use pairs of traces to form closed current loops Return currents on reference planes are greatly reduced Pairs must be routed close together to be effectiveShow DFM checkerNot a perfect solution: can still carry common mode return currents. Not the same as signal isolation!
29When all else fails…If EMC/crosstalk performance is critical, then complete isolation may be necessary to cross splits Isolation can be optical or galvanicBasic optocouplerDigital magnetic couplerShow DFM checkerAlways some propagation delay, and limited bandwidthLarge packages, costlyCan be used for logic level translationVery useful for interfacing to I/O ports where isolation is important
30Mixed signal designMixed signal design: any design where analog and digital systems operate in the same environment If you have a DAC or ADC in your design, it’s mixed signal. Power supplies may be considered analog systems Good mixed signal design is critical when digital and analog portions work at overlapping bandwidthsShow DFM checker
31Mixed signal design goals Our goal is to prevent unintentional signals form causing interaction between digital and analog systemsInteraction can be caused by conduction and field couplingMost basic rule is to spatially partition analog and digital sectionsDesign example: ADS bit ADC3.3V digital supply5.0V analog supply25MHz SPI interfaceExternal analog shunt reference voltageUse 9 pin header for digital signals and power suppliesUse edge SMC connector for analog signal inShow DFM checker
34Example Layout All high speed signals have their own return paths Reference is grounded on analog sideShow DFM checkerBypass caps close to supply pinsFerrite bead across split
35Example Layout (bottom layer only Show DFM checker
36PartitioningWe can make multiple sub-partitions by making additional splits in the reference planes This can decrease crosstalk between analog channelsShow DFM checker
37PartitioningWe do not split the ground plane completely The analog and digital supply pins of ADCs/DACs must be kept close to the same potential Common practice is to join the supply planes only underneath the ADCs/DACs Signal traces may only cross between partitions at that point Q: Do we need completely different power supplies for different partitions? A: No, but we need to partition that power supply using split planes, ferrite beads, and bypass capacitors so that the two partitions do not share current paths at HFShow DFM checker
38Choking suppliesExample: Using one regulator for both digital and analog partitionsA ferrite bead provides HF current loops between the two partitionsShow DFM checker
39Ferrite beadsCapacitors are useful for encouraging HF current to flow along certain paths Ferrite beads are high impedances at HF, and prevent HF currents from flowing through themFerrite beads are not inductorsBoth imaginary and real impedance increase with frequency, peak, and then decreaseForms damped resonances with bypass capacitors, so much less ringingShow DFM checker
40Considerations for SMPS Switch mode power supplies present great challenge Generate high dv/dt and di/dt, which causes lots of emissions Prevent B field emissions by minimizing loop areas Prevent E field coupling by screening with reference planesShow DFM checker
41Considerations for SMPS Switch mode power supplies present great challenge Generate high dv/dt and di/dt, which causes lots of emissions Prevent B field emissions by minimizing loop areas Prevent E field coupling by screening with reference planesVery high di/dtShow DFM checker
42Considerations for SMPS Switch mode power supplies present great challenge Generate high dv/dt and di/dt, which causes lots of emissions Prevent B field emissions by minimizing loop areas Prevent E field coupling by screening with reference planesVery high dv/dtVery high di/dtShow DFM checker
43Considerations for SMPS High di/dt loop is minimizedCapacitive coupling from high dv/dt node may be an issueCan use ground layer as a screen by putting other sensitive components on bottom sideAlways best to move SMPS as far from analog circuitry as possibleShow DFM checker
44Beyond two layersWhen it is not possible to adhere to good design techniques, you may need more layers Spacing between each layer may not be equal! Very important for high speed design. Distributed capacitance between inner reference layers is useful for high frequency bypassingCommon four layer stackup:One inner layer is for ground plane(s) only.Other inner layer is reserved for non-ground supply railsOuter layers are for traces and componentsShow DFM checker
45Four layers Four layer designs have two key advantages Separate layer for power supply routingBoth sides are freely available for components and signal tracesThis allows for much easier design and higher densityHowever, in general, signals cannot change layers in this stackup without changing reference planesProperly guiding return currents across multiple reference planes is difficultTherefore, unless you do not need signals to change layers, four layer designs are not suitable for high frequency designs!Show DFM checker
46Six layersOne common six layer stackup: equivalent to four layer stackup with two more outer signal layers added Signal layers 1 and 2 both use reference layer 3 for return Signal layers 5 and 6 both use reference layer 4 for return Traces on layer 1/6 run orthogonal to traces on layer 2/5, to reduce crosstalkShow DFM checker
47Six layersAnother six layer stackup: equivalent to four layer stackup with two more inner signal layers added Signal layers 1 and 3 both use reference layer 3 for return Signal layers 4 and 6 both use reference layer 5 for return Traces on layers 3 and 4 should run orthogonal to prevent crosstalkShow DFM checker
48ConclusionsEffective high layout design is all about controlling current pathsIntended current paths should be uninterrupted and low impedanceUnintended current paths should be minimized with proper partitioning and isolationNumber of layers and stackup type will depend on design requirementsIt is perfectly reasonable to have very high bandwidth systems on 2 layer boards. However, traces cannot cross or change layers easilyMoving to four layers allows more freedom for routing traces, on both sides, but traces still cannot change layers without risking signal integrityIn complex designs in which signal busses must cross, at least six layers will usually be necessaryShow DFM checker
49Conclusions Any questions? Proper mixed signal design is achieved by preventing shared current paths between analog and digital systemsComponent placement is at least as important as signal routingWe do not use completely split ground planes, but rather partitioned planes which connect at specific locationsMultiple sub-partitions can be made by further dividing the reference planesAnalog and digital partitions can share supply rails, but care must be taken to introduce new high frequency current pathsAny questions?Show DFM checker