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Power Electronic Devices Semester 1 Lecturer: Javier Sebastián Electrical Energy Conversion and Power Systems Universidad de Oviedo Power Supply Systems.

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Presentation on theme: "Power Electronic Devices Semester 1 Lecturer: Javier Sebastián Electrical Energy Conversion and Power Systems Universidad de Oviedo Power Supply Systems."— Presentation transcript:

1 Power Electronic Devices Semester 1 Lecturer: Javier Sebastián Electrical Energy Conversion and Power Systems Universidad de Oviedo Power Supply Systems

2 2 Research Group Power supply Systems (Sistemas Electrónicos de Alimentación) Javier Sebastián Dr. Electrical Engineer (Ingeniero Industrial) Full professor Room Edificio nº 3, Campus Universitario de Viesques Gijón (Asturias). Spain Phone (direct): Phone (secretary): Fax: Web:

3  Review of the physical principles of operation of semiconductor devices.  Thermal management in power semiconductor devices.  Power diodes.  Power MOSFETs.  The IGBT.  High-power, low-frequency semiconductor devices (thyristors). 3 Outline

4 4 Review of physical principles of semiconductors Power electronics devices G D S

5  Basic electromagnetic theory.  Basic circuit theory.  The operation of basic electronics devices in circuits. The student must understand the behaviour of the following electronics devices in simple circuits:  Diodes.  Bipolar Junction Transistors, both PNP and NPN types.  Field Effect Transistor, especially enhancement-mode Metal- Oxide-Semiconductor Field Effect Transistors (MOSFETs), both in N-channel- and P-channel types. 5 Previous requirements

6 Lesson 1 - Review of the physical principles of operation of semiconductor devices Semester 1 - Power Electronics Devices Electrical Energy Conversion and Power Systems Universidad de Oviedo 6

7 7 Outline Review of the physical principles of operation of semiconductor devices:  Basic concepts about semiconductor materials: band diagrams, intrinsic and extrinsic semiconductors, mechanisms for electric current conduction and continuity equation and its use in simple steady-state and transient situations.  Basic concepts about PN junctions: Equilibrium conditions, forward- and reverse-biased operation and calculation of the current flow when biased.  Reverse-biased voltage limits of PN junctions.  PIN junctions.  Conductivity modulation.  Transient effects in PN junctions in switching-mode operation.  Metal-semiconductor junctions.

8 8 Energy level in a semiconductor as a function of inter-atomic spacing Inter-atomic spacing Energy of electrons Actual spacing At 0 K, empty At 0 K, filled

9 9 Concept of band diagram Band gap Valence band Conduction band EgEg 4 electrons/atom states/atom Energy of electrons Empty at 0 K Filled at 0 K MaterialE g [eV] Ge0.66 Si1.1 4H - SiC3.26 GaN3.39

10 10 Band structure for insulators, semiconductors and metals at 0 K Band gap E g Conduction band Valence band Semiconductor E g =0.5-2 eV Band gap E g Conduction band Valence band Insulator E g = 5-10 eV Metals No E g Valence band Conduction band Overlap

11 11 Band structure for semiconductors at room temperature. Concept of “hole” Semiconductor E g =0.5-2 eV EgEg Conduction band Valence band Some electrons jump from the valence band to the conduction band. They are charge carriers because they can move from one atom to another. The empty state in the valence band is referred to as a “hole”. The holes have positive charge. They are also charge carriers. Visualization using the bonding model Si

12 12 Si Recombination Si Concepts of generation and recombination EgEg Generation EgEg

13 Si Why both holes and electrons are electric charge carriers? In general, there will be electric current due to both electrons and holes Example: when there is an electric field in the semiconductor lattice

14 14 How many electrons and holes are there in 1 cm 3 ? The number of these electrons and holes strongly depend on both E g and the room temperature. It is called intrinsic concentration and it is represented as “n i ”. The concentration of electrons in the conduction band (negative charge carriers) is represented as “n”. The concentration of holes in the valence band (positive charge carriers) is represented as “p”. Obviously n = p = n i in this type of semiconductors (intrinsic semiconductors) Some examples of the value of n i at room temperature: MaterialE g [eV]n i [elect./cm 3 ] Ge ·10 13 Si1.11.5·10 10 GaAs1.41.8·10 6 4H - SiC ·10 -9 GaN · Taking into account the number of bonds of valence band electrons in 1cm 3 of silicon, only one bond is broken for each amount of unbroken bonds (at room temperature)

15 15 Concept of extrinsic semiconductors: doping semiconductor materials Can we have different concentration of electrons and holes? The answer is yes. We need to introduce “special” impurities into the crystal:  Donors: atoms from column V of the Periodic Table. We obtain an extra electron for each atom of donor.  Acceptors: atoms from column III of the Periodic Table. We obtain an extra hole for each atom of acceptor Si Sb Si Donor Si Al Si Acceptor

16 16 N-type and P-type semiconductors Si Sb Si Donor Si Al - Si Acceptor N-type semiconductor: Majority carriers are electrons. Minority carriers are holes. Positively-charged atoms of donor (positive ions). P-type semiconductor: Majority carriers are holes. Minority carriers are electrons. Negatively-charged atoms of acceptor (negative ions).

17 17 hole electron + - P-type silicon Acceptor ions (negative ions) Al Thermal generation Donor ions (positive ions) Sb Thermal generation N-type silicon Charges in N-type and P-type semiconductors

18 18 Sb N-type Charge carries in N-type and P-type semiconductors P-type Al Concentration of majority carriers: p P Concentration of minority carriers: n P Mass action law: p P ·n P = n i 2 (only valid at equilibrium) Concentration of majority carriers: n N Concentration of minority carriers: p N Mass action law: n N ·p N = n i 2 (only valid at equilibrium) Very important equations!!!

19 19 Sb N-type Static charges in N-type and P-type semiconductors P-type Al Concentration of acceptors: N A (only negative static charges in a P-type semiconductor) Concentration of donors: N D (only positive static charges in a N-type semiconductor)

20 20 Sb N-type Neutrality in N-type and P-type semiconductors P-type Al Positive charges in volume V: p P ·V Negative charges in volume V: n P ·V + N A ·V Neutrality: p P = n P + N A Silicon, aluminium and antimony were neutral before being used  The extrinsic semiconductor must be neutral, too. Negative charges in volume V: n N ·V Positive charges in volume V: p N ·V + N D ·V Neutrality: n N = p N + N D Very important equations!!!

21 21 Sb N-type Calculating the concentration of electrons and holes (I) P-type Al Neutrality: p P = n P + N A Mass action law: p P ·n P = n i 2 2 known (N A and n i ) and 2 unkown (p P and n P ) variables  can be solved Neutrality: n N = p N + N D Mass action law: n N ·p N = n i 2 2 known (N D and n i ) and 2 unkown (n N and p N ) variables  can be solved

22 22 Sb N-type Calculating the concentration of electrons and holes (II) P-type Al N A >> n i Neutrality: p P  N A Mass action law: n P  n i 2 /N A N D >> n i Neutrality: n N  N D Mass action law: p N  n i 2 /N D Frequent case: quite heavy doped semiconductors Very useful equations!!!

23 23 Mechanisms to conduct electric current: Drift (I) Semiconductors can conduct electric current due to the presence of an electric field E jpjp  jnjn  E   j p_Drift = q·  p ·p·E is the current density of holes due to drift. j n_Drift = q·  n ·n·E is the current density of electrons due to drift.   

24 Mechanisms to conduct electric current: Drift (II) q = magnitude of the electronic charge (1.6· coulombs).  p = hole mobility.  n = electron mobility. p = hole concentration. n = electron concentration. E = electric field. 24  j p_Drift = q·  p ·p·E j n_Drift = q·  n ·n·E   

25 25 Electrons have migrated due to “diffusion” (you can see the same phenomenon in gases) j n_Diff  1 2 n1n1 n 2 < n Mechanisms to conduct electric current: Diffusion (I)

26 26 j n_Diff  1 2 n1n1 n 2 < n 1 If we maintain a different concentration of electrons, we also maintain the motion of electrons in the lattice  n  Mechanisms to conduct electric current: Diffusion (II)

27 27 j n_Diff  1 2 n1n1 n 2 < n  n  The current density is proportional to the electron concentration gradient: j n_Diff = q·D n · n    Mechanisms to conduct electric current: Diffusion (III) D n = electron diffusion coefficient.

28 p1p1 p 2 < p  p  The current density is proportional to the hole concentration gradient: j p_Diff = -q·D p · p    D p = hole diffusion coefficient. j p_Diff  Mechanisms to conduct electric current: Diffusion (IV)

29 29 j p_Diff = -q·D p · p    j n_Diff = q·D n · n    Mechanisms to conduct electric current: Diffusion (V) q = magnitude of the electronic charge (1.6· coulombs). D p = hole diffusion coefficient. D n = electron diffusion coefficient.  p = hole concentration gradient.  n = electron concentration gradient.  

30 30 Summary of conduction mechanisms j p_Diff = -q·D p · p    j n_Diff = q·D n · n     j p_Drift = q·  p ·p·E j n_Drift = q·  n ·n·E    Drift currents depend on the carrier concentration and on the electric field. Diffusion currents do not depend on the carrier concentration, but on the carrier concentration gradient.

31 31 A B There are some relationships between spatial and time variations of carrier concentrations because electrons and holes cannot mysteriously appear and disappear at a given point, but must be transported to or created at the given point via some type of ongoing action. Continuity equations (I) The concentration of holes can be time-changing due to: Different current density of holes across “A” and “B”. Excess of carriers over the equilibrium (mass action law). Generation of electron-hole pairs by radiation (light).

32 32 A B Continuity equations (II) Different current density of holes across “A” and “B” j p_A j p_B j n_B A B + - Excess of carriers over the equilibrium (mass action law). A B Light - + Generation of electron-hole pairs by radiation (light).

33 33 ·j p /q   -   p/  t = G L - [p(t)-p  ]/  p Taking into account the three effects, we obtain the continuity equation for holes: Continuity equations (III) Variation due to the excess of carriers over the equilibrium Total time variation of holes Variation due to the generation of electron-hole pairs by light Variation due to the different current density of holes across “A” and “B” G L : rate of generation of electron-hole pairs by light.  p : hole minority-carrier lifetime. p  : hole concentration in steady-state. ·j n /q   +   n/  t = G L - [n(t)-n  ]/  n Similarly, we can obtain the continuity equation for electrons:

34 34 We generate an “excess” of electron-hole pairs by injecting light into a piece of N-type silicon and we reach the steady-state. Time evolution of an “excess” of minority carries (I) ·j p /q   -   p/  t = G L - [p(t)-p  ]/  p 0 0  p 0 = G L ·  p + p  N N p0p pp Now the light injected disappears. We want to compute the time evolution of the hole concentration afterwards. N p0p p(t) pp

35 35 Time evolution of an “excess” of minority carries (II) We can also compute the time evolution of the hole concentration from the continuity equation: ·j p /q   -   p/  t = G L - [p(t)-p  ]/  p 0 0 After integrating  p(t) = p   +  (p  -  p  )·e -t  p pp pp p0p0 p(t) t pp Tangent line Same area Physical interpretation: There is an appreciable increase of holes during 3-5 times  p.

36 36 We constantly inject an “excess” of holes into a surface of a piece of N-type silicon and we reach the steady-state. No electric field exists and the hole current is due to diffusion. Spatial evolution of an “excess” of minority carries (I) ·j p /q   -   p/  t = G L - [p(t, x)-p  ]/  p 0 0  0 = - [p(x)-p  ]/  p + D p ·  2 [p(x)-p  ]/  x 2 x xNxN N p0 p0 p p After integrating  p(x) = p  + C 1 ·e -x/Lp + C 2 ·e x/Lp where : L p =(D p ·  p ) 1/2 is the minority hole diffusion length

37 37 Cases: a) L p << x N (wide crystal) :  p(x) = p   +  (p  -  p  )· e -x  L p (decay exponentially). b) L p >> x N (narrow crystal) :  p(x) = p   +  (p  -  p  )·(x N -x)/x N (decay linearly). c) Other cases  hyperbolic sine evolution. Spatial evolution of an “excess” of minority carries (II) p(x) = p  + C 1 ·e -x/Lp + C 2 ·e x/Lp x N : length of the N-type crystal L p : hole diffusion length p(x) pp p0p0 x xNxN pp p0p0 x xNxN L p << x N (wide) L p >> x N (narrow) Tangent line LpLp

38 38 What happens if we remove the barrier? P-type silicon - + Al Barrier to avoid carrier diffusion N-type silicon Sb Concept of PN junction (I)

39 39 Are all the carriers to be diffused? Al - P-side - + Al N-side Sb Holes begin to diffuse from the P-side to the N-side. Similarly, electrons diffuse from the N-side to the P-side Concept of PN junction (II)

40 40 Al - P-side - + Al - N-side Sb Are all the carriers to be diffused? Is this situation “the final situation”? The answer is no Is this situation “the final situation”? The answer is no Non-neutral P-type region, but negatively charged Non-neutral N-type region, but positively charged Concept of PN junction (III)

41 41 An electric field appears just in the boundary between both regions (we call this boundary metallurgical junction) + - E  Al - P-side - + Al N-side Sb Concept of PN junction (IV)

42 42 The electric field limits the carrier diffusion Al - P-side Al - N-type Sb E  Due to diffusion (  ) Due to drift (electric field) (  ) Concept of PN junction (V) Now, we do zoom over the metallurgical junction

43 43 Depletion region, or space charge region, or transition region Unbalanced charge exists because carriers barely exist Neutral P-type region (holes are balanced by negative ions ) Al Sb E  Neutral N-type region (electrons are balanced by positive ions ) Sb Concept of PN junction (VI) Steady-state situation near the metallurgical junction

44 44 Many holes, but neutral Many electrons, but neutral P-side (neutral) N-side (neutral) + - Metallurgical junction E  V0V0 Concept of PN junction (VII) Summary and terminology

45 45 Computing the built-in voltage V 0 (I) - + P-side N-side Net current passing through any section must be zero. As neither holes nor electrons are being accumulated in any parts of the crystal, net current due to holes is zero and net current due to electrons is zero. + Due to drift j p_Drift + Due to diffusion j p_Diff - Due to drift j n_Drift - Due to diffusion j n_Diff Currents must cancel each other

46 46 Computing the built-in voltage V 0 (II) N-side Zona P V0V0 j p_Drift = - j p_Diff + + (hole concentration in N-side ) p N + p P (hole concentration in P-side ) Due to drift j p_Drift + Due to diffusion j p_Diff

47 47 j p_Diff = -q·D p ·dp/dx j p_Drift = q·  p ·p·E E = -dV/dx E  j p_Drift = - j p_Diff Equations: Therefore: dV = -(D p /  p )·dp/p Computing the built-in voltage V 0 (III) After integrating : V 0 = V N-side – V P-side = -(D p /  p )·ln(p N /p P ) = (D p /  p )·ln(p P /p N ) Repeating the same process with electrons, we obtain: V 0 = (D n /  n )·ln(n N /n P ) It could be demonstrated: D p /  p = D n /  n = kT/q = V T (Einstein relation) k = Boltzmann constant. V T = 26 mV at 300 K.

48 N-side: many electrons Zona P V0V0 pNpN + pPpP P-side: many holes nNnN - nPnP V 0 = V T ·ln(p P /p N ) and also V 0 = V T ·ln(n N /n P ) Computing the built-in voltage V 0 (IV) Summary (I) Almost no holes or electrons Almost no electrons Almost no holes

49 49 V 0 = V T ·ln(p P /p N ) and also V 0 = V T ·ln(n N /n P ) Computing the built-in voltage V 0 (V) Summary (II) P-side N-side + - V0V0 If N A >> n i (current case) p P = N A n P = n i 2 /N A N A, p P, n P If N D >> n i (current case) n N = N D p N = n i 2 /N D N D, n N, p N V 0 = V T ·ln(N A ·N D /n i 2 ), V T = 26 mV at 300 K

50 50 P-side N-side W0W0 Charge neutrality implies: N A ·W P0 = N D ·W N0 W N0 Sb NDND W P0 Al - + NANA + The heavier doped a side, the narrower the depletion region in that side Depletion width in P-side and in N-side

51 51 Calculating the electric field E and the total depletion width W 0 (I) We already know: The charge density in both sides inside the depletion region:  P-side = N A ·q and  N-side = N D ·q The relative width of the depletion region in the P-side and in the N-side: N A ·W P0 = N D ·W N0 The built-in (contact) voltage: V 0 = V T ·ln(N A ·N D /n i 2 ) We need to know: The electric field E. The total depletion width W 0. E(x) + - P-side N-side - + W0W0 W N0 W P0 V0V0 - +  N-side  P-side We will use Gauss’ law and the relationship between electric field and voltage

52 52 Calculating the electric field E and the total depletion width W 0 (II) E(x) + - P-side N-side V 0 + E(x) -E max0 Electric field x  (x) Charge density x q·N D -q·N A V(x) V0V0 Voltage x W0W0 Gauss’ law: ·E(x) =  (x)/   Voltage and electric field: E(x) = - V 

53 53 Calculating the electric field E and the total depletion width W 0 (III) -E max0 Electric field x Charge density x q·N D -q·N A V0V0 Voltage x E(x) + - P-side N-side V 0 + W0W0 After applying Gauss’ law and the relationship between electric field and voltage, we obtain: 2·  ·(N A +N D )·V 0 W 0 = q·N A ·N D  ·(N A +N D ) E max0 = 2·q·N A ·N D ·V 0

54 54 Summary of the study of the PN junction with no external bias Almost no holes or electrons, but space charge, electric field and voltage P-side: many holes Almost no electrons N-side: many electrons Almost no holes P-side Doped N A N-side Doped N D - + W0W0 W N0 W P0 Electric field at the metallurgical junction E max0 - V 0 + V 0 = V T ·ln(N A ·N D /n i 2 ) 2·  ·(N A +N D )·V 0 W 0 = q·N A ·N D  ·(N A +N D ) E max0 = 2·q·N A ·N D ·V 0 N A ·W P0 = N D ·W N0 W 0 = W P0 + W N0 Very important equations!!!

55 Connecting external terminals to a PN junction Therefore: V = 0, i = 0 Hence: V mP – V 0 + V Nm = 0 And: V mP + V Nm = V 0 V0V0 - + P-side N-side + - V mP - + V Nm - + V = 0 i = 0 Conclusion: The built-in voltages across each metal- semiconductor contact cancel out the effect of V 0 in such a way that V 0 does not appear externally. Conclusion: The built-in voltages across each metal- semiconductor contact cancel out the effect of V 0 in such a way that V 0 does not appear externally. 55 metal-semiconductor contacts No energy can be dissipated here

56 56 VjVj - + V mP - + V Nm - + i  0 P-side N-side + - V ext - + Low resistivity: V N =0 Low resistivity: V P =0 V mP and V Nm do not change and, therefore V mP +V Nm = V 0 Biasing the PN junction: forward bias V 0 becomes V j now Conclusion: The built-in voltage across the junction has decreased V ext volts Conclusion: The built-in voltage across the junction has decreased V ext volts V ext = V mP - V j + V Nm = V 0 - V j Therefore: V j = V 0 - V ext

57 57 VjVj - + V mP - + V Nm - + i  0 P-side N-side + - V ext - + Low resistivity: V N =0 Low resistivity: V P =0 Biasing the PN junction: reverse bias Conclusion: The built-in voltage across the junction has increased V ext volts Conclusion: The built-in voltage across the junction has increased V ext volts V ext = -V mP +V j - V Nm = -V 0 + V j Therefore: V j = V 0 + V ext V mP and V Nm do not change and, therefore V mP +V Nm = V 0

58 58 V ext - + = VjVj - + P-side N-side + - i Biasing the PN junction: notation for a general case Conclusion: Always: V j = V 0 - V ext, being:  0 < V ext < V 0 (forward biased)  V ext < 0 (reverse biased) Conclusion: Always: V j = V 0 - V ext, being:  0 < V ext < V 0 (forward biased)  V ext < 0 (reverse biased)

59 59 Effects of the bias on the depletion region We must replace V 0 with V j, that is, replace V 0 with V 0 -V ext Always: V 0 = V T ·ln(N A ·N D /n i 2 ) Without bias 2·  ·(N A +N D )·V 0 W 0 = q·N A ·N D  ·(N A +N D ) E max0 = 2·q·N A ·N D ·V 0 V j0 = V 0 With bias 2·  ·(N A +N D )·(V 0 -V ext ) W(V ext ) = q·N A ·N D  ·(N A +N D ) E max (V ext ) = 2·q·N A ·N D ·(V 0 -V ext ) V j (V ext ) = V 0 - V ext

60 60 P-side - + N-side V0V0 W0W0  (x) x E(x) -E max0 x V j (x) V0V0 x -E max V 0 -V 1 Less spatial charge V 0 -V 1 P-side - + N-side V1V1 W Effects of the forward bias on the depletion region Lower electric field Lower built-in voltage

61 61 P-side - + N-side V0V0 W0W0  (x) x E(x) -E max0 x V j (x) V0V0 x V 0 +V 2 -E max V 0 +V 2 V2V2 P-side - + N-side W More spatial charge Higher electric field Higher built-in voltage Effects of the reverse bias on the depletion region

62 62 nN nN nPnP No bias: V 0 = V T ·ln(n N /n P ) - + Zona P P-side V0V0 Forward bias: V 0 -V ext =V T ·ln(n NV /n PV ) n NV n PV V 0 -V ext Effects of the bias on the neutral regions (I) For holes with forward bias: V 0 -V ext =V T ·ln(p PV /p NV )

63 n PV = n N ·e -(V 0 -V ext )/ V T Effects of the bias on the neutral regions (II) The quotients n NV /n PV and p PV /p NV strongly change with bias. In practice, n NV and p PV do not change appreciably (i.e., n NV  n N and p PV  p P ) for charge neutrality reasons. Therefore the concentration of minority carriers (i.e., p NV and n PV ) strongly changes at the depletion region edges. The values of n PV and p NV can be easily obtained: V 0 -V ext =V T ·ln(n N /n PV )  V 0 -V ext =V T ·ln(p P /p NV )  p NV = p P ·e -(V 0 -V ext )/ V T 63 As n N  N D and p P  N A, then: n PV = N D ·e -(V 0 -V ext )/ V T p NV = N A ·e -(V 0 -V ext )/ V T

64 V ext - + = VjVj - + V j = V 0 -V ext Zona P Zona N + - p P = N A n N = N D Effects of the bias on the neutral regions (III) 64 p NV = N A ·e -V j / V T Biased junction p N = n i 2 /N D = N A ·e -V 0 / V T Non-biased junction n PV = N D ·e -V j / V T Biased junction n P = n i 2 /N A = N D ·e -V 0 / V T Non-biased junction

65 V j = V 0 -V ext VjVj - + P-side N-side + - Effects of the bias on the neutral regions (IV) 65 p NV = N A ·e -V j / V T n PV = N D ·e -V j / V T Forward bias: The concentration of minority carriers at the depletion region edges increases, because V j < V 0 Reverse bias: The concentration of minority carriers at the depletion region edges decreases, because V j < V 0 Forward and reverse bias: The concentration of majority carriers in neutral regions does not change Concentration of minority carriers :

66 VjVj - + P-side N-side + - Effects of the bias on the neutral regions (V) 66 What happens with the minority carriers along the neutral regions? This is a case of injection of an “excess” of minority carriers (see slide #36). Cases of interest: a)L p << x N (wide N-side)  decay exponentially b) L p >> x N (narrow N-side)  decay linearly

67 67 Length p NV n PV 0 Minority carrier concentration pNpN nPnP Length p NV n PV 0 Minority carrier concentration nPnP pNpN V ext P-side N-side Wide P and N sides V ext P-side N-side Narrow P and N sides Effects of the bias on the neutral regions (VI) The concentration of minority carriers along the neutral regions under forward biasing. 0.1 mm0.001 mm Excess of minority carriers It plays a fundamental role evaluating the switching speed of electronic devices.

68 68 Length p NV n PV 0 Minority carrier concentration pNpN nPnP Length p NV n PV 0 Minority carrier concentration nPnP pNpN V ext P-side N-side Wide P and N sides V ext P-side N-side Narrow P and N sides Effects of the bias on the neutral regions (VII) The concentration of minority carriers along the neutral regions under reverse biasing. 0.1 mm0.001 mm Deficit (negative excess) of minority carriers

69 69 Carriers along the overall device Properties of Si at 300 K D p =12.5 cm 2 /s D n =35 cm 2 /s  p =480 cm 2 /V·s  n =1350 cm 2 /V·s n i =10 10 carriers/cm 3  r =11.8 Example of a silicon PN junction V 0 =0.596 V N A =10 15 atm/cm 3  p =100 ns L p =0.01 mm N D =10 15 atm/cm 3  n =100 ns L n =0.02 mm P -side N-side Forward biased with V ext = 0.48 V p NV pPpP n PV nNnN Carriers/cm Length [mm] Log scale They decay exponentially (log scale)

70 70 Calculating the current passing through a PN junction (I) We have addressed a lot of important issues related the PN junction: Charge, electric field and voltage across the depletion region. Concentration of majority and minority carriers along the total device. However, the most important issue has not been addressed so far: How can we compute the current passing through the device? Fortunately, we already have the tools to answer this question.

71 71 several mm V ext VjVj 0.3m0.3m PN - + P-side N-side Two questions arise:  What carrier must be evaluated to compute the overall current?  Where? Calculating the current passing through a PN junction (II) j total = j p_total (x) + j n_total (x) = j p_Drift (x) + j p_Diff (x) + j n_Drift (x) + j n_Diff (x) j total Case of wide P and N sides Places:  Depletion region 1.  Neutral regions far from the depletion region 2.  Neutral regions, but near the depletion region edges

72 72 Carriers/cm 3 nPnP pNpN p NV n PV Log scale 1m1m Calculating the current passing through a PN junction (III) several mm V ext VjVj 0.3m0.3m PN - + P-side N-side j total Computing the overall current from the current density due to carriers in the depletion region j total = j p_Drift (x) + j p_Diff (x) + j n_Drift (x) + j n_Diff (x) Currents due to drift (j p_Drift and j n_Drift ) have opposite direction to currents due to diffusion. Both currents have extremely high values (very high electric field and carrier concentration gradient) and cannot be determined precisely enough to guarantee that the difference (which is the total current) is properly computed. Therefore, this is not the right place.

73 73 Calculating the current passing through a PN junction (IV) V ext VjVj PN - + P-side j total Computing the overall current from the current density due to carriers in the neutral regions far from the depletion region j total = j p_Drift (x) + j p_Diff (x) + j n_Drift (x) + j n_Diff (x) Current is due to drift of majority carriers. However, it cannot be determined properly because we do not know the value of the “weak” electric field. Therefore, these are not the right places. j p_Drift (x) = q·  p ·p(x)·E(x) j n_Drift (x) = q·  n ·n(x)·E(x) j p_Diff (x) = -q·D p ·dp(x)/dx j n_Diff (x) = q·D n ·dn(x)/dx  0 Few electrons in P-side Constant concentration  Weak field  High concentration

74 74 Calculating the current passing through a PN junction (V) Computing the overall current from the current density due to carriers in the neutral regions but near the depletion region edges (I) V ext VjVj PN - + P-side j total j total = j p_Drift (x) + j p_Diff (x) + j n_Drift (x) + j n_Diff (x) We cannot compute the total current yet, but we can compute the current density due to minority carriers: j n_total (x) = j n_Drift (x) + j n_Diff (x)  j n_Diff (x) = q·D n ·dn(x)/dx j p_Drift (x) = q·  p ·p(x)·E(x) j n_Drift (x) = q·  n ·n(x)·E(x) j p_Diff (x) = -q·D p ·dp(x)/dx j n_Diff (x) = q·D n ·dn(x)/dx  0 Few electrons in P-side  Weak field  High concentration

75 j p_total (x) Length 0 Minority carrier concentration pNpN nPnP 75 Calculating the current passing through a PN junction (VI) Computing the overall current from the current density due to carriers in the neutral regions but near the depletion region edges (II) j n_total (x) = q·D n ·dn PV (x)/dx We can do the same for the holes just in the opposite side of the depletion region j p_total (x)= -q·D p ·dp NV (x)/dx V ext VjVj PN - + P-side N-side j n_total (x) j p_total (x) p NV n PV Length 0 Current density j n_total (x) Taking derivatives

76 76 Calculating the current passing through a PN junction (VII) Computing the overall current from the current density due to carriers in the neutral regions but near the depletion region edges (III) V ext VjVj PN - + P-side N-side j n_total (x) j p_total (x) Length 0 Current density of minority carriers j n_total (x) The carrier density currents passing through the depletion region are constant because the probability of carrier recombination is very low, due to the low carrier concentration in that region. What happens with carriers in the depletion region?

77 The total current density passing through the device can be computed as the addition of the two minority current densities at the edges of the depletion region 77 Calculating the current passing through a PN junction (VIII) Computing the overall current from the current density due to carriers in the neutral regions but near the depletion region edges (IV) V ext VjVj PN - + P-side N-side j n_total (x) j p_total (x) Length 0 Current density j n_total (x) Now the total current density can be easily computed j total Very important conclusion!!!

78 We need to know the variation of the minority carrier concentrations at the depletion region edges. We have to calculate the gradients of these concentrations (taking derivatives). We have to calculate the current densities due to these minority carriers, which are diffusion currents. We must add both current densities to obtain the total current density, which is constant along all the device. This is the total current density passing through the device. 78 Calculating the current passing through a PN junction (IX) VjVj P-sideN-side - + j n_total (x) j p_total (x) Summary of the computing of the overall current density in a PN junction

79 79 Calculating the current passing through a PN junction (X) VjVj P-sideN-side - + j n_total (x) j p_total (x) Once the total current density and the minority-carrier current densities are known, the majority-carrier current density can be easily calculated by difference. j p_total (x) Length 0 Current density j n_total (x) j total Majority-carrier currents, due to both drift and diffusion Minority-carrier currents, only due to diffusion Total current

80 nPnP 80 Current passing through an asymmetrical junction (P + N - ) V ext VjVj - + P + -side (wide) N - -side j n_total (x) Length 0 Current density p NV n PV Length 0 pNpN Concentration j p_total (x) j n_total (x) j total P-side is heavily doped (P + ) and wide N-side is slightly doped (N - ) and narrow This is a case of special interest, because it is directly related to the operation of Bipolar Junction Transistors (BJTs)

81 Length 0 Minority carrier concentration pNpN nPnP 81 Qualitative study of the current in a forward-biased PN junction V ext VjVj PN - + P-side N-side j total p NV n PV j p_total (x) Length 0 Current density j n_total (x) j total High and positive total current density High slope  High current density due to electrons in the depletion region High slope  High current density due to holes in the depletion region

82 Length 0 Minority carrier concentration pNpN nPnP 82 Qualitative study of the current in a reverse-biased PN junction V ext VjVj PN - + P-side N-side j total n PV Low and negative total current density p NV Low slope  Low current density due to electrons in the depletion region Low slope  Low current density due to holes in the depletion region Length 0 Current density j n_total (x) j total j p_total (x)

83 Procedure: 1- Compute the concentration of minority holes (electrons) in the proper edge of the depletion region when a given voltage is externally applied. 2- Compute the excess minority hole (electron) concentration at the above mentioned place. It is also a function of the externally applied voltage. 3- Compute the decay of the excess minority hole (electron) concentration (exponential, if the semiconductor side is wide, or linear, if it is narrow). 4- Compute the gradient of the decay of the excess minority hole (electron) concentration just at the proper edge of the depletion region. 5- Compute the diffusion current density due to the above mentioned gradient. 5- Once the current due to minority holes (electrons) has been calculated, repeat the same process with electrons (holes). 6- Add both current densities. 7- Compute the total current by multiplying the current density by the cross- sectional area. 83 Quantitative study of the current in a PN junction (I)

84 The final results is: i = I S ·(e V ext /V T - 1), where: I S = A·q·n i 2 ·[D p /(N D ·L p )+D n /(N A ·L n )] (I s is called reverse-bias saturation current) V T = kT/q where: A = cross-sectional area. q = magnitude of the electronic charge (1.6· coulombs). n i = intrinsic carrier concentration. D p = hole diffusion coefficient. D n = electron diffusion coefficient. L p  = hole diffusion length in N-side. L n  = electron diffusion length in P-side. N D = donor concentration. N A = acceptor concentration. k = Boltzmann constant. T = absolute temperature (in Kelvin). 84 Quantitative study of the current in a PN junction (II) P N + - i V ext (Shockley equation)

85 i = I S ·(e V ext /V T - 1) I S = A·q·n i 2 ·[D p /(N D ·L p )+D n /(N A ·L n )] V T = kT/q 85 Quantitative study of the current in a PN junction (III) Forward bias V O > V ext >> V T Reverse bias V ext << -V T  exponential dependence i  I S ·e V ext VTVT i  -I S   constant (reverse-bias saturation current) V ext [V] i [mA] i [nA] V ext [V]

86 86 Quantitative study of the current in a PN junction (IV) Length p NV n PV 0 Minority carrier concentration pNpN nPnP Length p NV n PV 0 Minority carrier concentration nPnP pNpN V ext P-side N-side Wide sides V ext P-side N-side Narrow sides Wide versus narrow P and N sides X N X N >> L p X N X N << L p I S = A·q·n i 2 ·[D p /(N D ·L p )+D n /(N A ·L n )] I S = A·q·n i 2 ·[D p /(N D ·X N )+D n /(N A ·X P )] X P X P >> L n X P X P << L n Equation i = I S ·(e V ext /V T - 1) is valid in both cases

87 Equation i = I S ·(e V ext /V T - 1) describes the operation in the range V O > V ext > - . However, three questions arise: What happens if V ext > V O ? How does the temperature affect this characteristic? What is the actual maximum voltage that the junction can withstand? 87 Quantitative study of the current in a PN junction (V) The I-V characteristic in a real scale of use i [A] V ext [V] VjVj - + V mP - + V Nm - + i  0 P-side N-side + - V N  0 V P  0 V ext + - When V ext appraches V 0 (or it is even higher), the current passing is so high that the voltage drop in the neutral regions is not zero. This voltage drop is proportional to the current (it behaves as a resistor). According to Shockley equation Actual I-V characteristic

88 88 Decreases with T Increases with T  Forward bias: i  I S ·e V ext /V T = I S ·e q·V ext /kT  Reverse bias: i  -I S where: I S = A·q·n i 2 ·[D p /(N D ·L p )+D n /(N A ·L n )]. It should be taken into account that n i strongly depends on the temperature. Therefore: Temperature dependence of the I-V characteristic (I) Reverse current strongly increases when the temperature increases. It doubles its value when the temperature increases 10 o C. In practice, forward current increases when the temperature increases. For extremely high currents, the dependence can become just the opposite.

89 i [A] V ext [V] Forward bias P N + - i V 37 0 C 27 0 C V ext [V] i [  A] Reverse bias 27 0 C 37 0 C Temperature dependence of the I-V characteristic (II) In both cases, the current increases for a given external voltage.

90 90 There are three different physical processes which limit the reverse voltage that a given PN junction can withstand: Punch-through Zener breakdown Avalanche breakdown Maximum reverse voltage that a PN junction can withstand 0 i V ext i + V ext - P N This phenomenon does not take place in power devices (two heavily doped regions are needs). Actual reverse current is higher than predicted due to the generation of electron-hole pairs by collisions with the lattice. If the electric field is high enough, this phenomenon becomes degenerative. It will be explained later

91 As already known, both the electric field and depletion length increase. When the maximum electric field is high enough, the avalanche breakdown starts. 91 W 0 = 2·  ·(N A +N D )·V 0 q·N A ·N D E max0 =  ·(N A +N D ) 2·q·N A ·N D ·V 0 No bias Reverse bias W(V rev ) = 2·  ·(N A +N D )·(V 0 +V rev ) q·N A ·N D E max (V rev ) =  ·(N A +N D ) 2·q·N A ·N D ·(V 0 +V rev ) W(V rev ) NP - + V 0 +V rev -E max (V rev ) V0V0 PN - + W0W0 -E max0 Electric field in the depletion region with reverse bias

92 Punch-through limit 92 E max (V rev )   ·(N A +N D ) 2·q·N A ·N D ·|V rev | W(V rev ) N P - +  |V rev | -E max W PN W(V rev )  2·  ·(N A +N D )·|V rev | q·N A ·N D Avalanche breakdown limit -E BR We must design the semiconductor according to: E max (V rev ) < E BR. The breakdown voltage is: V BR = E BR 2 ·  ·(N A + N D )/(2q·N A ·N D ). Moreover, W(V rev ) < W PN to avoid the phenomenon called punch-through. Usually W(V BR ) < W PN, which means that practical voltage limit is not due to punch-through, but to avalanche breakdown. Limits for the depletion region with reverse bias

93 93 A high value of V BR is obtained if one of the two regions has been slightly doped (i.e., either N A or N D is relatively low). However, it should taken into account that low values of N D (N A ) implies:  Wide W N (W P ), which also implies wide X N (X P ) to avoid punch-through.  Low n N (p P ) and, therefore, low conductivity. If we have long length and low conductivity, then we have high resistivity. Hence, a trade-off between resistivity and breakdown voltage must be established. What must we do to withstand high-voltage? 2·q·N A ·N D V BR = E BR 2 ·  ·(N A + N D ) NANA 2q V BR = ·( + ) E BR 2 ·  1 1 NDND  WNWN XNXN p P = N A n N = N D P+P+ - N - -side + NDND NANA N A >> N D

94 94 -E max x V rev x  (x) x q·N D -q·N A N A >> N D P+P+ - N - -side + NDND NANA Maximum electric field E max with reverse bias V rev -E BR The main part of the reverse voltage is dropping in the slightly doped region. V rev_P V rev_N Can we increase V BR for a given E BR value? - Yes, we can. We must modify the electric field profile. - The result is the PIN junctions. V BR

95 95 PIN junctions (I) W(V rev ) NP - + V rev -E max (V rev ) Main idea: the voltage across the device is proportional to the dashed area (E(x) = - dV/dx). Can we have the same area (same voltage across the device) with a lower value of E max (V rev )? Yes, we can. We need another E(x) profile. -E max (V rev ) new profile (ideal) -E max (V rev ) -E max (V rev ) new profile (real) -E max (V rev ) To obtain this profile, we need a region without space charge (undoped) inside the PN junction.

96 96 P-side - N-side + PIN junctions (II) q·N D  (x) x -q·N A -E max x V rev x Intrinsic Many holes Many electrons A few holes and electrons It means P-Intrinsic-N Negative space charge Positive space charge Characteristics: - Good forward operation due to conductivity modulation. - Low depletion capacitance. - Slow switching operation. All these characteristics will be explained later.

97 97 Other structure to withstand high voltage: P + N - N + P+P+ - + N-N- + N+N+ -q·N A q·N D1  (x) x q·(N D2 -N D1 ) x -E max (V rev1 ) -E max (V rev2 ) Heavily doped PHeavily doped NLightly doped N V rev2 > V rev1 Low reverse voltage V rev1 Reverse voltage V rev2 N D1 NANA N D2 q·N D2 Partially depleted

98 98 Forward-bias behaviour of structures to withstand high voltage In both cases, there is a high-resistivity layer (called drift region) This means that, when forward biased, bad behaviour might be expected. However, a new phenomenon arises and the result is quite better than expected. This phenomenon is called conductivity modulation. In this case, high-level injection takes place. P+P+ N+N+ Intrinsic Undoped PIN P+P+ N+N+ N-N- Lightly doped P+N-N+P+N-N+

99 99 Injection levels Log scale Carriers/cm Length [mm] P + -side N - -side n PV nNnN pPpP p NV Low-level injection: n N (0 + ) >> p NV (0 + ) Log scale Length [mm] P + -side N - -side n PV nNnN pPpP p NV High-level injection: n N (0 + )  p NV (0 + ) Low-level injection has been assumed so far, for PN and P + N - junctions. In the case of a P + N - junction, this assumption is only valid if the forward bias is not very intense. Else, high-level injection starts. If the forward voltage is high enough, p NV (0 + ) approaches n N (0 + ). In this case, n N does not remain constant any more, but it notably increases. Not possible!

100 100 Conductivity modulation P+P+ N+N+ N-N- Drift region P+N-N+P+N-N+ N A = N D2 = N D1 = n P+ p N+ n N-  p N- Holes are injected from the P + -side Electrons are injected from the N + -side There is carrier injection from both highly doped regions to the drift region. This is called double injection. This phenomenon substantially increases the carrier concentration in the drift region, thus dramatically reducing the device resistivity.

101 101 Semiconductor junctions designed to withstand high voltage PIN P+N-N+P+N-N+ A high-resistivity region (drift region) is needed to withstand high voltage when the junction is reverse biased. Fortunately, this high-resistivity “magically” disappears when the junction is forward biased if the device is properly designed to have conductivity modulation. Due to this, devices where the current is passing through P-type and N-type regions (bipolar devices) have superior performances in on-state than devices where the current always passes through the same type (either P or N) of extrinsic semiconductor (unipolar devices). Unfortunately, bipolar devices have inferior switching characteristics than unipolar devices. Due to this, a trade-off between conduction losses and switching losses has to be established frequently selecting power semiconductor devices. Summary

102 102 If we change the bias conditions instantaneusly, can the current change instantaneusly as well? The answer is “no, it cannot”. This is due to the fact that the current conducted by a PN junction depends on the minority carrier concentration just at the edges of the depletion region and the voltage withstood by a PN junction depends on the depletion region width. In both cases, carriers have to be either generated or recombined or moved, which always takes time. These non-idealities can characterize as: Parasitic capacitances (useful for linear applications) Switching times (useful for switching applications) Transient and AC operation of a PN junction

103 103 Parasitic capacitances: depletion layer capacitance (I) (also known as junction capacitance) This is the dominant capacitance in reverse bias x  (x) V ext P-side V O +V ext - + Zona N V O +V ext +  V ext - + N-side V ext +  V ext Carriers are pulled out from the depletion region when V ext is increased in  V ext. Additional space charge has been generated.

104 P N V ext PN junction V ext V ext +  V ext Capacitor Capacitor: new charges are located at the same distance  constant capacitance. PN junction: new charges are located farther away from each other  non-constant capacitance. V ext +  V ext - + P N - + Parasitic capacitances: depletion layer capacitance (II)

105 105 In an “abrupt” PN junction (as we have considered so far), this capacitance is a K·(V 0 -V ext ) -1/2 -type function C j =dQ/dV=  ·A/W(V ext ) W(V ext ) = 2·  ·(N A +N D )·(V 0 -V ext ) q·N A ·N D C j = A· 2·(N A +N D )·(V 0 -V ext )  ·q·N A ·N D W(V ext ) -dQ dQ As it is a non-constant capacitance, static and dynamic capacitances could be defined. The latter is defined as: Then: 0 V ext CjCj Parasitic capacitances: depletion layer capacitance (III) As:

106 106 This capacitance is the one dominant in forward bias Reverse bias Forward bias C j increases when the PN junction is forward biased. However, depletion layer capacitance only dominates the reactance of a PN junction under reverse bias. For forward bias, the diffusion capacitance (due to the charge stored in the neutral regions) becomes dominant. 0 V ext CjCj Parasitic capacitances: diffusion capacitance (I)

107 107 Increase of minority carriers due to a increase of 60mV in forward bias Carriers/cm Longitud [mm] pPpP p NV nNnN n PV V=180mV This increase in electric charge is a function of the forward bias voltage. This means that a capacitive effect takes place in these conditions. The dynamic capacitance thus obtained is called diffusion capacitance. V=240mV Parasitic capacitances: diffusion capacitance (II)

108 108 Switching times in PN junctions (I) The diode behaviour seems to be ideal in this time scale. Transition from “a” to “b” (switching off) in a wide time scale (ms or s). a b V1V1 V2V2 R i v + - i v t t V 1 /R -V 2 Let us consider a PN diode as PN junction. The results obtained can be generalized to PN junctions in other semiconductor devices.

109 109 a b V1V1 V2V2 R i v + - Transition from “a” to “b” (switching off) in a narrow time scale (  s or ns). i v t t t rr V 1 /R -V 2 /R tsts t f (i= -0.1·V 2 /R) -V 2 t s = storage time. t f = fall time. t rr = reverse recovery time. Reverse recovery peak Switching times in PN junctions (II)

110 110 a b V1V1 V2V2 R i v + - Why does this evolution occur? This is because the junction cannot withstand voltage until all the excess of minoritary carriers disappears from the neutral regions. V 1 /R v t i t p NV n PV Carriers/cm 3 8· · Length [mm] t0t0 t0t0 t3t3 t3t3 t1t1 t1t1 t2t2 t2t2 -V 2 -V 2 /R t4t4 t4t4 t0t0 t0t0 Switching times in PN junctions (III)

111 111 a b V1V1 V2V2 R i v + - p NV n PV Carriers/cm 3 8· · Length [mm] i t d = delay time. t r = rise time. t fr = t d + t r = forward recovery time. trtr 0,9·V 1 /R tdtd 0,1·V 1 /R t fr t0t0 t0t0 t1t1 t1t1 t2t2 t2t2 t3t3 t3t3 t4t4 t4t4 Switching times in PN junctions (IV) Transition from “b” to “a” (switching on) in a narrow time scale (  s or ns).

112 112 Trade-off between static and dynamic behaviour in PN junctions P + N - N + and PIN structures allow us to combine high reverse voltage (due to a wide drift region) and low forward resistivity (due to conductivity modulation). However, these structures imply large excess of minority carriers (even majority carries due to conductivity modulation). This excess of carriers must be eliminated when the device switches off to allow the device to withstand voltage. The time to remove this excess of carriers depends on the width of the drift layer. If the drift layer is shorter than a hole diffusion length, then very little charge is stored and the device switches off fast. In this case, however, the device cannot withstand high reverse voltages P+P+ N+N+ N-N- N A = N D2 = N D1 = n P+ p N+ n N-  p N- Log scale Excess of holes in N - Excess of electrons in N - Excess of electrons in P + Excess of holes in N + The switching process can be made still faster by purposely adding “recombination centers”, such as Au atoms in Si, to increase the recombination rate. However, this fact can deteriorate the conductivity modulation.

113 113 Introduction to the metal-semiconductor junctions (I) Case #1: an N-type semiconductor transfers electrons to a metal N-type semiconductor Metal N N-type Donor ions Electrons (thin sheet) Metals have many more electrons than semiconductors. However, metals and semiconductors are different materials. This is not the case of a PN junction, where the two sides (P and N) are made up of the same material. In a PN junction made up of a given semiconductor, electrons (holes) move from the N-side (P-side) to the P-side (N-side) due to diffusion, until the built- in voltage establishes an equilibrium between diffusion and drift currents. In a metal-semiconductor junction, the electron movement when the junction is being built strongly depends on the work function of both materials. The higher the work function, the more difficult for the electrons to eject the material. 4 possibilities exist when you build a Metal-Semiconductor (MS) junction:

114 In Case #1 and Case #2, a depletion region in the semiconductor side has been generated. This depletion region has a built-in voltage that stops the electron diffusion. This built-in voltage can be decreased by external forward bias (thus allowing massive electron diffusion) or increased by external reverse bias (avoiding electron diffusion). The final result is that it works like a rectifying contact (similar to a PN junction). 114 P-type semiconductor Metal P P-type Acceptor ions Lack of electrons (thin sheet ) Case #2: a metal transfers electrons to a P-type semiconductor Introduction to the metal-semiconductor junctions (II) Recombination between the transferred electrons and the P-side holes takes place in this edge.

115 115 N-type semiconductor Metal N-type Electrons (thin sheet) Lack of electrons (thin sheet) Case #4: a P-type semiconductor transfers electrons to a metal P-type semiconductor Metal P-type Electrons (thin sheet) Holes (thin sheet) Introduction to the metal-semiconductor junctions (III) Case #3: a metal transfers electrons to an N-type semiconductor We have an ohmic contact (non-rectifying contact) in both cases.

116 116 Rectifying contacts (I) The width of the depletion region, the maximum electric field and the depletion layer capacitance can be calculated as in the case of a PN junction with an extremely-doped P side (i.e., N A  ). Therefore:  E max0 = 2·q·N D ·V 0 2·  ·V 0 W 0 = q·N D C j0 = A· 2·V 0  ·q·N D However, the built-in voltage and the I-V characteristic depend on the work function of both the semiconductor and the metal. Case #1: an N-type semiconductor transfers electrons to a metal W0W0 Metal N N-type NDND

117 117 Rectifying contacts (II) Built-in voltage: V 0 = (  m -  s_N )/q, where:  m = metal work function.  S_n = N-type semiconductor work function. Barrier voltage to avoid electron diffusion without bias: V B = (  m -  S_n )/q, where:  S_n = N-type semiconductor electron affinity. I-V characteristic: i = I S ·(e V ext /V T - 1), as in a PN junction. However, the value of I s has a very different value: I S = A *·A·T 2 ·e -V B /V T, where: A * = Richardson constant (120 amps/(cm 2 ·K 2 )). To define these concepts properly, we should introduce others. This task, however, is beyond the scope of this course.

118 118 Schematic Symbol Rectifying contacts (III) There is a type of diode based on the operation of a rectifying contact. It is the Schottky diode. Schottky diodes are widely used in many applications, including RF (telecom) circuits and low-voltage, medium-power power converters. Main features:  Lower forward voltage drop than a similar-range, PN- junction diode.  They are faster than PN diodes because minority carriers hardly play any role in the current conduction process. They are majority carrier devices.  However, they always have a higher reverse current (this is not a big problem).  When they are made up of silicon, the maximum reverse voltage (compatible with reasonable drop voltage in forward bias) is about 200 V.  However, Schottky diodes made up of wide-bandgap materials (such as silicon carbide and gallium nitride) reach breakdown voltages as high as V.

119 119 Ohmic contacts There are two different possibilities to obtain ohmic contacts: a) According to the previous slides, to have an MS junction corresponding to Case #3 or to Case #4. b) To have MS junctions corresponding to Cases #1 or #2, but with an extremely-doped semiconductor side (10 19 atoms/cm 3 ). In this situation, electrons can flow in both directions by a tunneling process. P+P+ N+N+ N N A1 = N D2 = N D1 = N A2 = P N+N+ N N D2 = N D1 = Ohmic contacts Rectifying contacts Ohmic contacts PN diodeSchottky diode Beyond the scope of this course, as well.


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