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**Power Electronic Devices**

Electrical Energy Conversion and Power Systems Universidad de Oviedo Power Electronic Devices Semester 1 Power Supply Systems Lecturer: Javier Sebastián

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**(Sistemas Electrónicos de Alimentación)**

Research Group Power supply Systems (Sistemas Electrónicos de Alimentación) Javier Sebastián Dr. Electrical Engineer (Ingeniero Industrial) Full professor Room Edificio nº 3, Campus Universitario de Viesques Gijón (Asturias). Spain Phone (direct): Phone (secretary): Fax: Web:

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Outline Review of the physical principles of operation of semiconductor devices. Thermal management in power semiconductor devices. Power diodes. Power MOSFETs. The IGBT. High-power, low-frequency semiconductor devices (thyristors).

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**Power electronics devices**

Outline Review of physical principles of semiconductors Power electronics devices G D S

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**Previous requirements**

Basic electromagnetic theory. Basic circuit theory. The operation of basic electronics devices in circuits. The student must understand the behaviour of the following electronics devices in simple circuits: Diodes. Bipolar Junction Transistors, both PNP and NPN types. Field Effect Transistor, especially enhancement-mode Metal- Oxide-Semiconductor Field Effect Transistors (MOSFETs), both in N-channel- and P-channel types.

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**Semester 1 - Power Electronics Devices**

Electrical Energy Conversion and Power Systems Universidad de Oviedo Lesson 1 - Review of the physical principles of operation of semiconductor devices Semester 1 - Power Electronics Devices

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Outline Review of the physical principles of operation of semiconductor devices: Basic concepts about semiconductor materials: band diagrams, intrinsic and extrinsic semiconductors, mechanisms for electric current conduction and continuity equation and its use in simple steady-state and transient situations. Basic concepts about PN junctions: Equilibrium conditions, forward- and reverse-biased operation and calculation of the current flow when biased. Reverse-biased voltage limits of PN junctions. PIN junctions. Conductivity modulation. Transient effects in PN junctions in switching-mode operation. Metal-semiconductor junctions.

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**Energy level in a semiconductor as a function of inter-atomic spacing**

At 0 K, empty Inter-atomic spacing Energy of electrons Actual spacing - At 0 K, filled

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**Concept of band diagram**

Empty at 0 K Eg 4 electrons/atom - 4 states/atom Energy of electrons Band gap Valence band Conduction band Filled at 0 K Material Eg [eV] Ge 0.66 Si 1.1 4H - SiC 3.26 GaN 3.39

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**Band structure for insulators, semiconductors and metals at 0 K**

Band gap Eg Conduction band Valence band Semiconductor Eg=0.5-2 eV Band gap Eg Conduction band Valence band Insulator Eg= 5-10 eV Metals No Eg Valence band Conduction band Overlap

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**Visualization using the bonding model**

Band structure for semiconductors at room temperature. Concept of “hole” Si - Eg Conduction band Valence band - + - + - Semiconductor Eg=0.5-2 eV Visualization using the bonding model Some electrons jump from the valence band to the conduction band. They are charge carriers because they can move from one atom to another. The empty state in the valence band is referred to as a “hole”. The holes have positive charge. They are also charge carriers.

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**Concepts of generation and recombination**

Eg - + Eg - + - - Si - Si - - - - - + + 12

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**Why both holes and electrons are electric charge carriers?**

In general, there will be electric current due to both electrons and holes Example: when there is an electric field in the semiconductor lattice + - Si - - - - + +

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**How many electrons and holes are there in 1 cm3?**

The number of these electrons and holes strongly depend on both Eg and the room temperature. It is called intrinsic concentration and it is represented as “ni”. The concentration of electrons in the conduction band (negative charge carriers) is represented as “n”. The concentration of holes in the valence band (positive charge carriers) is represented as “p”. Obviously n = p = ni in this type of semiconductors (intrinsic semiconductors) Some examples of the value of ni at room temperature: Material Eg [eV] ni [elect./cm3] Ge 0.66 2.4·1013 Si 1.1 1.5·1010 GaAs 1.4 1.8·106 4H - SiC 3.26 8.2·10-9 GaN 3.39 1.9·10-10 Taking into account the number of bonds of valence band electrons in 1cm3 of silicon, only one bond is broken for each amount of 1013 unbroken bonds (at room temperature)

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**Concept of extrinsic semiconductors: doping semiconductor materials**

Can we have different concentration of electrons and holes? The answer is yes. We need to introduce “special” impurities into the crystal: Donors: atoms from column V of the Periodic Table. We obtain an extra electron for each atom of donor. Acceptors: atoms from column III of the Periodic Table. We obtain an extra hole for each atom of acceptor. - Si 1 2 3 Al Acceptor - Si 1 2 3 4 Sb Donor + - 5 - - +

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**N-type and P-type semiconductors**

Si 1 2 3 Al- + Acceptor - Si 1 2 3 4 Sb+ 5 Donor N-type semiconductor: Majority carriers are electrons. Minority carriers are holes. Positively-charged atoms of donor (positive ions). P-type semiconductor: Majority carriers are holes. Minority carriers are electrons. Negatively-charged atoms of acceptor (negative ions).

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**Charges in N-type and P-type semiconductors**

+ Acceptor ions (negative ions) Al- - + Thermal generation P-type silicon hole electron + - Donor ions (positive ions) Sb+ - + Thermal generation N-type silicon

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**Charge carries in N-type and P-type semiconductors**

Al- - + Concentration of majority carriers: pP Concentration of minority carriers: nP Mass action law: pP·nP = ni2 (only valid at equilibrium) Sb+ - + N-type Concentration of majority carriers: nN Concentration of minority carriers: pN Mass action law: nN·pN = ni2 (only valid at equilibrium) Very important equations!!!

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**Static charges in N-type and P-type semiconductors**

Al- - + Concentration of acceptors: NA (only negative static charges in a P-type semiconductor) Sb+ - + N-type Concentration of donors: ND (only positive static charges in a N-type semiconductor)

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**Neutrality in N-type and P-type semiconductors**

Silicon, aluminium and antimony were neutral before being used Þ The extrinsic semiconductor must be neutral, too. P-type Al- - + Positive charges in volume V: pP·V Negative charges in volume V: nP·V + NA·V Neutrality: pP = nP + NA Sb+ - + N-type Negative charges in volume V: nN·V Positive charges in volume V: pN·V + ND·V Neutrality: nN = pN + ND Very important equations!!!

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**Calculating the concentration of electrons and holes (I)**

P-type Al- - + Neutrality: pP = nP + NA Mass action law: pP·nP = ni2 2 known (NA and ni) and 2 unkown (pP and nP) variables Þ can be solved Sb+ - + N-type Neutrality: nN = pN + ND Mass action law: nN·pN = ni2 2 known (ND and ni) and 2 unkown (nN and pN) variables Þ can be solved

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**Calculating the concentration of electrons and holes (II)**

Frequent case: quite heavy doped semiconductors P-type Al- - + NA >> ni Neutrality: pP » NA Mass action law: nP » ni2/NA ND >> ni Neutrality: nN » ND Mass action law: pN » ni2/ND Sb+ - + N-type Very useful equations!!!

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**Mechanisms to conduct electric current: Drift (I)**

Semiconductors can conduct electric current due to the presence of an electric field E E - - - - + + + + - - - - + + + + jp jn jp_Drift = q·p·p·E is the current density of holes due to drift. jn_Drift = q·n·n·E is the current density of electrons due to drift.

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**Mechanisms to conduct electric current: Drift (II)**

jp_Drift = q·p·p·E jn_Drift = q·n·n·E q = magnitude of the electronic charge (1.6·10-19 coulombs). p = hole mobility. n = electron mobility. p = hole concentration. n = electron concentration. E = electric field.

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**Mechanisms to conduct electric current: Diffusion (I)**

- - - - - - - - - - - - - - - 1 2 n1 n2 < n1 - - - jn_Diff Electrons have migrated due to “diffusion” (you can see the same phenomenon in gases)

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**Mechanisms to conduct electric current: Diffusion (II)**

If we maintain a different concentration of electrons, we also maintain the motion of electrons in the lattice - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1 2 n1 n2 < n1 - - - n jn_Diff

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**Mechanisms to conduct electric current: Diffusion (III)**

- - - - - - - - - - - - - - - - - - - - 1 2 n1 n2 < n1 - - n jn_Diff The current density is proportional to the electron concentration gradient: jn_Diff = q·Dn· n Dn = electron diffusion coefficient.

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**Mechanisms to conduct electric current: Diffusion (IV)**

+ + + + + + + + + + + + + + + + + + + + 1 2 p1 p2 < p1 + + p jp_Diff The current density is proportional to the hole concentration gradient: jp_Diff = -q·Dp· p Dp = hole diffusion coefficient.

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**Mechanisms to conduct electric current: Diffusion (V)**

jp_Diff = -q·Dp· p jn_Diff = q·Dn· n q = magnitude of the electronic charge (1.6·10-19 coulombs). Dp = hole diffusion coefficient. Dn = electron diffusion coefficient. Ñp = hole concentration gradient. Ñn = electron concentration gradient.

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**Summary of conduction mechanisms**

jp_Drift = q·p·p·E jn_Drift = q·n·n·E Drift currents depend on the carrier concentration and on the electric field. jp_Diff = -q·Dp· p jn_Diff = q·Dn· n Diffusion currents do not depend on the carrier concentration, but on the carrier concentration gradient.

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**Continuity equations (I)**

There are some relationships between spatial and time variations of carrier concentrations because electrons and holes cannot mysteriously appear and disappear at a given point, but must be transported to or created at the given point via some type of ongoing action. The concentration of holes can be time-changing due to: Different current density of holes across “A” and “B”. Excess of carriers over the equilibrium (mass action law). Generation of electron-hole pairs by radiation (light) . A B

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**Continuity equations (II)**

jp_A jp_B jn_B A B Different current density of holes across “A” and “B”. - - + + + + A B Excess of carriers over the equilibrium (mass action law). + - Light A B Generation of electron-hole pairs by radiation (light) . - +

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** - + ·jp/q p/t = GL- [p(t)-p]/p ·jn/q**

Continuity equations (III) Taking into account the three effects, we obtain the continuity equation for holes: ·jp/q - p/t = GL- [p(t)-p]/p Variation due to the different current density of holes across “A” and “B” Total time variation of holes Variation due to the generation of electron-hole pairs by light Variation due to the excess of carriers over the equilibrium GL: rate of generation of electron-hole pairs by light. tp: hole minority-carrier lifetime. p: hole concentration in steady-state. Similarly, we can obtain the continuity equation for electrons: ·jn/q + n/t = GL- [n(t)-n]/n

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**Time evolution of an “excess” of minority carries (I)**

We generate an “excess” of electron-hole pairs by injecting light into a piece of N-type silicon and we reach the steady-state. ·jp/q - p/t = GL- [p(t)-p]/p Þ p0= GL·p + p + N + p p0 N Now the light injected disappears. We want to compute the time evolution of the hole concentration afterwards. p0 N + + + + + p(t) + + + + p

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**Time evolution of an “excess” of minority carries (II)**

We can also compute the time evolution of the hole concentration from the continuity equation: ·jp/q - p/t = GL- [p(t)-p]/p After integrating Þ p(t) = p+(p-p)·e-tp p Tangent line p p0 p(t) t Same area Physical interpretation: There is an appreciable increase of holes during 3-5 times tp.

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**where : Lp=(Dp· p)1/2 is the minority hole diffusion length**

Spatial evolution of an “excess” of minority carries (I) We constantly inject an “excess” of holes into a surface of a piece of N-type silicon and we reach the steady-state. No electric field exists and the hole current is due to diffusion. x xN + N p0 + p ·jp/q - p/t = GL- [p(t, x)-p]/p Þ 0 = - [p(x)-p]/p + Dp·2[p(x)-p]/x2 After integrating Þ p(x) = p + C1·e-x/Lp + C2·ex/Lp where : Lp=(Dp· p)1/2 is the minority hole diffusion length

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**p(x) = p + C1·e-x/Lp + C2·ex/Lp**

Spatial evolution of an “excess” of minority carries (II) p(x) = p + C1·e-x/Lp + C2·ex/Lp xN: length of the N-type crystal Lp: hole diffusion length Cases: a) Lp << xN (wide crystal): Þ p(x) = p+(p-p)·e-xLp (decay exponentially). b) Lp >> xN (narrow crystal): Þ p(x) = p+(p-p)·(xN-x)/xN (decay linearly). c) Other cases Þ hyperbolic sine evolution. Lp >> xN (narrow) Lp << xN (wide) p(x) p p0 x xN p(x) p p0 x xN Tangent line Lp

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**What happens if we remove the barrier?**

Concept of PN junction (I) P-type silicon - + Al- N-type silicon Sb+ - + Barrier to avoid carrier diffusion What happens if we remove the barrier?

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**Are all the carriers to be diffused?**

Concept of PN junction (II) Al- P-side - + N-side Sb+ - + Holes begin to diffuse from the P-side to the N-side. Similarly, electrons diffuse from the N-side to the P-side Are all the carriers to be diffused?

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**- - - - - - P-side N-side Is this situation “the final situation”?**

Concept of PN junction (III) Are all the carriers to be diffused? P-side N-side Al- Al- + Al- Al- - Sb+ Sb+ Sb+ - - Sb+ + + + - + - + Al- Al- Al- Al- Sb+ Sb+ Sb+ Sb+ - Non-neutral P-type region, but negatively charged Non-neutral N-type region, but positively charged Is this situation “the final situation”? The answer is no

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**Concept of PN junction (IV)**

Al- P-side - + N-side Sb+ - + + - E An electric field appears just in the boundary between both regions (we call this boundary metallurgical junction)

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**Concept of PN junction (V)**

Now, we do zoom over the metallurgical junction Al- P-side N-type Sb+ + - + - + - E Due to diffusion (® ¬) Due to drift (electric field) (¬®) The electric field limits the carrier diffusion

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**Steady-state situation near the metallurgical junction**

Concept of PN junction (VI) Steady-state situation near the metallurgical junction Neutral P-type region (holes are balanced by negative ions ) Al- + Al- Sb+ + - E Neutral N-type region (electrons are balanced by positive ions ) Sb+ - Depletion region, or space charge region, or transition region Unbalanced charge exists because carriers barely exist

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**Summary and terminology**

Concept of PN junction (VII) Summary and terminology Metallurgical junction P-side (neutral) N-side + - E V0 Many holes, but neutral Many electrons, but neutral Depletion, or transition, or space charge region (non neutral) There is space charge and, therefore, there are electric field E and voltage V0. However, there are almost no charge carriers

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**Computing the built-in voltage V0 (I)**

Net current passing through any section must be zero. As neither holes nor electrons are being accumulated in any parts of the crystal, net current due to holes is zero and net current due to electrons is zero. - + P-side N-side + Due to diffusion jp_Diff + Due to drift jp_Drift - Due to diffusion jn_Diff - Due to drift jn_Drift Currents must cancel each other Currents must cancel each other

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**Computing the built-in voltage V0 (II)**

pP (hole concentration in P-side ) + (hole concentration in N-side ) pN + N-side Zona P V0 + + Due to diffusion jp_Diff + Due to drift jp_Drift jp_Drift = - jp_Diff

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**Computing the built-in voltage V0 (III)**

Equations: jp_Drift = - jp_Diff jp_Drift = q·p·p·E jp_Diff = -q·Dp·dp/dx E = -dV/dx E Therefore: dV = -(Dp/mp)·dp/p After integrating : V0 = VN-side – VP-side = -(Dp/p)·ln(pN/pP) = (Dp/p)·ln(pP/pN) Repeating the same process with electrons, we obtain: V0 = (Dn/n)·ln(nN/nP) k = Boltzmann constant. VT = 26 mV at 300 K. It could be demonstrated: Dp/p = Dn/n = kT/q = VT (Einstein relation)

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**V0 = VT·ln(pP/pN) and also V0 = VT·ln(nN/nP)**

Computing the built-in voltage V0 (IV) pP + - nN - nP Summary (I) pN + + - V0 Zona P P-side: many holes N-side: many electrons Almost no holes or electrons Almost no electrons Almost no holes V0 = VT·ln(pP/pN) and also V0 = VT·ln(nN/nP)

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**If NA >> ni (current case) If ND >> ni (current case)**

Computing the built-in voltage V0 (V) Summary (II) P-side N-side V0 If NA >> ni (current case) pP = NA nP = ni2/NA NA, pP, nP If ND >> ni (current case) nN = ND pN = ni2/ND ND, nN, pN V0 = VT·ln(pP/pN) and also V0 = VT·ln(nN/nP) V0 = VT·ln(NA·ND/ni2), VT = 26 mV at 300 K

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**Charge neutrality implies: NA·WP0 = ND·WN0**

Depletion width in P-side and in N-side P-side N-side W0 WN0 Sb+ - ND WP0 Al- + NA Charge neutrality implies: NA·WP0 = ND·WN0 The heavier doped a side, the narrower the depletion region in that side

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**Calculating the electric field E and the total depletion width W0 (I)**

V0 - + rN-side We need to know: The electric field E. The total depletion width W0. rP-side E(x) + - P-side N-side - + W0 WN0 WP0 We already know: The charge density in both sides inside the depletion region: rP-side = NA·q and rN-side = ND·q The relative width of the depletion region in the P-side and in the N-side: NA·WP0 = ND·WN0 The built-in (contact) voltage: V0 = VT·ln(NA·ND/ni2) We will use Gauss’ law and the relationship between electric field and voltage

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**Gauss’ law: ·E(x) = (x)/e**

Calculating the electric field E and the total depletion width W0 (II) E(x) + - P-side N-side - + W0 - V0 + (x) Charge density x q·ND -q·NA Gauss’ law: ·E(x) = (x)/e E(x) -Emax0 Electric field x V(x) V0 Voltage x Voltage and electric field: E(x) = - V

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**Calculating the electric field E and the total depletion width W0 (III)**

E(x) + - P-side N-side - V0 + W0 After applying Gauss’ law and the relationship between electric field and voltage, we obtain: -Emax0 Electric field x Charge density q·ND -q·NA V0 Voltage 2··(NA+ND)·V0 W0 = q·NA·ND ·(NA+ND) Emax0 = 2·q·NA·ND·V0

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**Summary of the study of the PN junction with no external bias**

Electric field at the metallurgical junction Emax0 - V0 + P-side Doped NA N-side Doped ND - + P-side: many holes Almost no electrons W0 WN0 WP0 N-side: many electrons Almost no holes Almost no holes or electrons, but space charge, electric field and voltage Very important equations!!! V0 = VT·ln(NA·ND/ni2) W0 = WP0 + WN0 NA·WP0 = ND·WN0 2··(NA+ND)·V0 W0 = q·NA·ND ·(NA+ND) Emax0 = 2·q·NA·ND·V0

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**Connecting external terminals to a PN junction**

metal-semiconductor contacts V0 - + P-side N-side + - VmP - + VNm - + V = 0 i = 0 No energy can be dissipated here Therefore: V = 0, i = 0 Hence: VmP – V0 + VNm = 0 And: VmP + VNm = V0 Conclusion: The built-in voltages across each metal-semiconductor contact cancel out the effect of V0 in such a way that V0 does not appear externally.

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**Biasing the PN junction: forward bias**

Low resistivity: VN=0 VP=0 P-side N-side + - VmP and VNm do not change and, therefore VmP+VNm= V0 VmP - + VNm Vj - + i 0 V0 becomes Vj now Vext - + Vext = VmP - Vj + VNm = V0 - Vj Therefore: Vj = V0 - Vext Conclusion: The built-in voltage across the junction has decreased Vext volts

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**Biasing the PN junction: reverse bias**

Low resistivity: VN=0 VP=0 P-side N-side + - VmP - + VNm Vj - + VmP and VNm do not change and, therefore VmP+VNm= V0 i 0 Vext - + Vext = -VmP +Vj - VNm = -V0 + Vj Therefore: Vj = V0 + Vext Conclusion: The built-in voltage across the junction has increased Vext volts

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**Biasing the PN junction: notation for a general case**

Vext - + = Vj P-side N-side + - i Conclusion: Always: Vj = V0 - Vext, being: 0 < Vext < V0 (forward biased) Vext < 0 (reverse biased)

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**Effects of the bias on the depletion region**

We must replace V0 with Vj, that is, replace V0 with V0-Vext Without bias With bias Vj0 = V0 Vj (Vext) = V0 - Vext 2··(NA+ND)·V0 W0 = q·NA·ND 2··(NA+ND)·(V0-Vext) W(Vext) = q·NA·ND ·(NA+ND) Emax0 = 2·q·NA·ND·V0 ·(NA+ND) Emax(Vext) = 2·q·NA·ND·(V0-Vext) Always: V0 = VT·ln(NA·ND/ni2)

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**Effects of the forward bias on the depletion region**

P-side - + N-side V0 W0 V0-V1 P-side - + N-side V1 W Effects of the forward bias on the depletion region (x) x E(x) -Emax0 Vj(x) V0 -Emax V0-V1 Less spatial charge Lower electric field Lower built-in voltage

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**Effects of the reverse bias on the depletion region**

P-side - + N-side V0 W0 V0+V2 V2 P-side - + N-side W Effects of the reverse bias on the depletion region (x) x E(x) -Emax0 Vj(x) V0 V0+V2 -Emax More spatial charge Higher electric field Higher built-in voltage

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**Effects of the bias on the neutral regions (I)**

nPV nNV nN nP - + Zona P P-side - - - V0 V0-Vext No bias: V0 = VT·ln(nN/nP) Forward bias: V0-Vext =VT·ln(nNV/nPV) For holes with forward bias: V0-Vext =VT·ln(pPV/pNV)

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**Effects of the bias on the neutral regions (II)**

The quotients nNV/nPV and pPV/pNV strongly change with bias. In practice, nNV and pPV do not change appreciably (i.e., nNV » nN and pPV » pP) for charge neutrality reasons. Therefore the concentration of minority carriers (i.e., pNV and nPV) strongly changes at the depletion region edges. The values of nPV and pNV can be easily obtained: V0-Vext =VT·ln(nN/nPV) Þ V0-Vext =VT·ln(pP/pNV) Þ nPV = nN·e -(V0-Vext)/ VT pNV = pP·e -(V0-Vext)/ VT As nN » ND and pP » NA, then: nPV = ND·e -(V0-Vext)/ VT pNV = NA·e -(V0-Vext)/ VT

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**Effects of the bias on the neutral regions (III)**

pN = ni2/ND = NA·e -V0/ VT Non-biased junction nP = ni2/NA = ND·e -V0/ VT Non-biased junction pNV = NA·e -Vj/ VT Biased junction nPV = ND·e -Vj/ VT Biased junction Vext - + = Vj Vj = V0-Vext Zona P Zona N + - pP = NA nN = ND

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**Effects of the bias on the neutral regions (IV)**

pNV = NA·e -Vj/ VT nPV = ND·e -Vj/ VT Concentration of minority carriers : Forward bias: The concentration of minority carriers at the depletion region edges increases, because Vj < V0 Reverse bias: The concentration of minority carriers at the depletion region edges decreases, because Vj < V0 Vj - + P-side N-side + - Vj = V0-Vext Forward and reverse bias: The concentration of majority carriers in neutral regions does not change

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**What happens with the minority carriers along the neutral regions?**

Effects of the bias on the neutral regions (V) What happens with the minority carriers along the neutral regions? Vj - + P-side N-side + - This is a case of injection of an “excess” of minority carriers (see slide #36). Cases of interest: Lp << xN (wide N-side) Þ decay exponentially b) Lp >> xN (narrow N-side) Þ decay linearly

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**Excess of minority carriers**

Effects of the bias on the neutral regions (VI) The concentration of minority carriers along the neutral regions under forward biasing. Vext P-side N-side Wide P and N sides Vext P-side N-side Narrow P and N sides 0.1 mm 0.001 mm Length pNV nPV Minority carrier concentration pN nP Length pNV nPV Minority carrier concentration nP pN Excess of minority carriers It plays a fundamental role evaluating the switching speed of electronic devices.

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**Deficit (negative excess) of minority carriers**

Effects of the bias on the neutral regions (VII) The concentration of minority carriers along the neutral regions under reverse biasing. Vext P-side N-side Wide P and N sides Vext P-side N-side Narrow P and N sides 0.1 mm 0.001 mm Length pNV nPV Minority carrier concentration pN nP Length pNV nPV Minority carrier concentration nP pN Deficit (negative excess) of minority carriers

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**pP nN nPV pNV Carriers along the overall device P -side N-side**

Properties of Si at 300 K Dp=12.5 cm2/s Dn=35 cm2/s p=480 cm2/V·s n=1350 cm2/V·s ni=1010 carriers/cm3 r=11.8 Example of a silicon PN junction NA=1015 atm/cm3 p=100 ns Lp=0.01 mm ND=1015 atm/cm3 n=100 ns Ln=0.02 mm P -side N-side V0=0.596 V Carriers/cm3 104 1012 1014 1016 -0.3 -0.2 -0.1 0.1 0.2 0.3 Length [mm] 1010 108 106 pNV pP nPV nN Forward biased with Vext = 0.48 V They decay exponentially (log scale) Log scale

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**How can we compute the current passing through the device?**

Calculating the current passing through a PN junction (I) We have addressed a lot of important issues related the PN junction: Charge, electric field and voltage across the depletion region. Concentration of majority and minority carriers along the total device. However, the most important issue has not been addressed so far: How can we compute the current passing through the device? Fortunately, we already have the tools to answer this question.

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**Calculating the current passing through a PN junction (II)**

Case of wide P and N sides several mm Vext Vj 0.3m P N - + P-side N-side jtotal 2 3 3 2 1 jtotal = jp_total(x) + jn_total(x) = jp_Drift(x) + jp_Diff(x) + jn_Drift(x) + jn_Diff(x) Two questions arise: What carrier must be evaluated to compute the overall current? Where? Places: Depletion region 1 . Neutral regions far from the depletion region Neutral regions, but near the depletion region edges

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**Calculating the current passing through a PN junction (III)**

Computing the overall current from the current density due to carriers in the depletion region several mm Vext Vj 0.3m P N - + P-side N-side jtotal Carriers/cm3 nP pN 1014 1016 pNV nPV Log scale 1mm jtotal = jp_Drift(x) + jp_Diff(x) + jn_Drift(x) + jn_Diff(x) Currents due to drift (jp_Drift and jn_Drift) have opposite direction to currents due to diffusion. Both currents have extremely high values (very high electric field and carrier concentration gradient) and cannot be determined precisely enough to guarantee that the difference (which is the total current) is properly computed. Therefore, this is not the right place.

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**Constant concentration**

Calculating the current passing through a PN junction (IV) Computing the overall current from the current density due to carriers in the neutral regions far from the depletion region Vext jtotal Vj P-side - + P N jtotal = jp_Drift(x) + jp_Diff(x) + jn_Drift(x) + jn_Diff(x) High concentration Weak field » 0 Constant concentration jp_Drift(x) = q·p·p(x)·E(x) jn_Drift(x) = q·n·n(x)·E(x) jp_Diff (x) = -q·Dp·dp(x)/dx jn_Diff (x) = q·Dn·dn(x)/dx » 0 » 0 Few electrons in P-side Current is due to drift of majority carriers. However, it cannot be determined properly because we do not know the value of the “weak” electric field. Therefore, these are not the right places.

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**Calculating the current passing through a PN junction (V)**

Computing the overall current from the current density due to carriers in the neutral regions but near the depletion region edges (I) Vext Vj P N - + P-side jtotal jtotal = jp_Drift(x) + jp_Diff(x) + jn_Drift(x) + jn_Diff(x) High concentration Weak field jp_Drift(x) = q·p·p(x)·E(x) jn_Drift(x) = q·n·n(x)·E(x) jp_Diff (x) = -q·Dp·dp(x)/dx jn_Diff (x) = q·Dn·dn(x)/dx » 0 Few electrons in P-side We cannot compute the total current yet, but we can compute the current density due to minority carriers: jn_total (x) = jn_Drift(x) + jn_Diff(x) » jn_Diff (x) = q·Dn·dn(x)/dx

75
**Calculating the current passing through a PN junction (VI)**

Computing the overall current from the current density due to carriers in the neutral regions but near the depletion region edges (II) We can do the same for the holes just in the opposite side of the depletion region Vext Vj P N - + P-side N-side jn_total(x) jp_total(x) Length Minority carrier concentration pN nP pNV nPV jn_total(x) = q·Dn·dnPV(x)/dx Taking derivatives jp_total (x)= -q·Dp·dpNV(x)/dx Length Current density jp_total(x) jn_total(x)

76
**What happens with carriers in the depletion region?**

Calculating the current passing through a PN junction (VII) Computing the overall current from the current density due to carriers in the neutral regions but near the depletion region edges (III) What happens with carriers in the depletion region? Vext Vj P N - + P-side N-side jn_total(x) jp_total(x) jp_total(x) Length Current density of minority carriers jn_total(x) The carrier density currents passing through the depletion region are constant because the probability of carrier recombination is very low, due to the low carrier concentration in that region.

77
**Calculating the current passing through a PN junction (VIII)**

Computing the overall current from the current density due to carriers in the neutral regions but near the depletion region edges (IV) Vext Vj P N - + P-side N-side jn_total(x) jp_total(x) Now the total current density can be easily computed jtotal jp_total(x) Length Current density jn_total(x) Very important conclusion!!! The total current density passing through the device can be computed as the addition of the two minority current densities at the edges of the depletion region

78
**Calculating the current passing through a PN junction (IX)**

Summary of the computing of the overall current density in a PN junction Vj P-side N-side - + jn_total(x) jp_total(x) We need to know the variation of the minority carrier concentrations at the depletion region edges. We have to calculate the gradients of these concentrations (taking derivatives). We have to calculate the current densities due to these minority carriers, which are diffusion currents. We must add both current densities to obtain the total current density, which is constant along all the device. This is the total current density passing through the device.

79
**Majority-carrier currents, due to both drift and diffusion**

Calculating the current passing through a PN junction (X) Once the total current density and the minority-carrier current densities are known, the majority-carrier current density can be easily calculated by difference. Vj P-side N-side - + jn_total(x) jp_total(x) Total current jtotal jp_total(x) Length Current density jn_total(x) Majority-carrier currents, due to both drift and diffusion Minority-carrier currents, only due to diffusion

80
**Current passing through an asymmetrical junction (P+N-)**

P-side is heavily doped (P+) and wide N-side is slightly doped (N-) and narrow Vext Vj - + P+-side (wide) N--side jn_total(x) Length pN Concentration pNV nPV nP This is a case of special interest, because it is directly related to the operation of Bipolar Junction Transistors (BJTs) Length Current density jtotal jp_total(x) jn_total(x)

81
**High and positive total current density**

Qualitative study of the current in a forward-biased PN junction Vext Vj P N - + P-side N-side jtotal Length Minority carrier concentration pN nP pNV nPV High slope Þ High current density due to electrons in the depletion region High slope Þ High current density due to holes in the depletion region jp_total(x) Length Current density jn_total(x) jtotal High and positive total current density

82
**Low and negative total current density**

Qualitative study of the current in a reverse-biased PN junction Vext Vj P N - + P-side N-side jtotal Length Minority carrier concentration pN nP pNV nPV Low slope Þ Low current density due to holes in the depletion region Low slope Þ Low current density due to electrons in the depletion region Low and negative total current density Length Current density jn_total(x) jtotal jp_total(x)

83
**Quantitative study of the current in a PN junction (I)**

Procedure: 1- Compute the concentration of minority holes (electrons) in the proper edge of the depletion region when a given voltage is externally applied. 2- Compute the excess minority hole (electron) concentration at the above mentioned place. It is also a function of the externally applied voltage. 3- Compute the decay of the excess minority hole (electron) concentration (exponential, if the semiconductor side is wide, or linear, if it is narrow). 4- Compute the gradient of the decay of the excess minority hole (electron) concentration just at the proper edge of the depletion region. 5- Compute the diffusion current density due to the above mentioned gradient. 5- Once the current due to minority holes (electrons) has been calculated, repeat the same process with electrons (holes). 6- Add both current densities. 7- Compute the total current by multiplying the current density by the cross- sectional area.

84
**+ - i Vext Quantitative study of the current in a PN junction (II)**

The final results is: i = IS·(eVext/VT - 1), where: IS = A·q·ni2·[Dp/(ND·Lp)+Dn/(NA·Ln)] (Is is called reverse-bias saturation current) VT = kT/q where: A = cross-sectional area. q = magnitude of the electronic charge (1.6·10-19 coulombs). ni = intrinsic carrier concentration. Dp = hole diffusion coefficient. Dn = electron diffusion coefficient. Lp= hole diffusion length in N-side. Ln= electron diffusion length in P-side. ND = donor concentration. NA = acceptor concentration. k = Boltzmann constant. T = absolute temperature (in Kelvin). P N + - i Vext (Shockley equation)

85
**Quantitative study of the current in a PN junction (III)**

i = IS·(eVext/VT - 1) IS = A·q·ni2·[Dp/(ND·Lp)+Dn/(NA·Ln)] VT = kT/q Vext [V] 100 0.25 - 0.25 i [mA] 0.5 Forward bias VO > Vext >> VT i » IS·e Vext VT Þ exponential dependence -10 -0.5 i [nA] Vext [V] Reverse bias Vext << -VT i » -IS Þ constant (reverse-bias saturation current)

86
**Wide versus narrow P and N sides**

Quantitative study of the current in a PN junction (IV) Wide versus narrow P and N sides Vext P-side N-side Wide sides Vext P-side N-side Narrow sides XP XP >> Ln XN XN >> Lp XP XP << Ln XN XN << Lp Length pNV nPV Minority carrier concentration pN nP Length pNV nPV Minority carrier concentration nP pN IS = A·q·ni2·[Dp/(ND·Lp)+Dn/(NA·Ln)] IS = A·q·ni2·[Dp/(ND·XN)+Dn/(NA·XP)] Equation i = IS·(eVext/VT - 1) is valid in both cases

87
**Quantitative study of the current in a PN junction (V)**

The I-V characteristic in a real scale of use 1 -4 3 i [A] Vext [V] Equation i = IS·(eVext/VT - 1) describes the operation in the range VO > Vext > -. However, three questions arise: What happens if Vext > VO? How does the temperature affect this characteristic? What is the actual maximum voltage that the junction can withstand? Actual I-V characteristic According to Shockley equation Vj - + VmP VNm i 0 P-side N-side + - VN ¹ 0 VP ¹ 0 Vext When Vext appraches V0 (or it is even higher), the current passing is so high that the voltage drop in the neutral regions is not zero. This voltage drop is proportional to the current (it behaves as a resistor).

88
**Temperature dependence of the I-V characteristic (I)**

Reverse bias: i » -IS where: IS = A·q·ni2·[Dp/(ND·Lp)+Dn/(NA·Ln)]. It should be taken into account that ni strongly depends on the temperature. Therefore: Reverse current strongly increases when the temperature increases. It doubles its value when the temperature increases 10 oC. Forward bias: i » IS·eVext/VT = IS·eq·Vext/kT Decreases with T Increases with T In practice, forward current increases when the temperature increases. For extremely high currents, the dependence can become just the opposite.

89
**+ - Temperature dependence of the I-V characteristic (II) Forward bias**

30 1 i [A] Vext [V] Forward bias -0.25 -10 Vext [V] i [mA] Reverse bias P N + - i V 370C 37 0C 27 0C 27 0C In both cases, the current increases for a given external voltage.

90
**Maximum reverse voltage that a PN junction can withstand**

There are three different physical processes which limit the reverse voltage that a given PN junction can withstand: Punch-through Zener breakdown Avalanche breakdown It will be explained later This phenomenon does not take place in power devices (two heavily doped regions are needs). Actual reverse current is higher than predicted due to the generation of electron-hole pairs by collisions with the lattice. If the electric field is high enough, this phenomenon becomes degenerative. i Vext i + Vext - P N + - + - + -

91
**Electric field in the depletion region with reverse bias**

No bias Reverse bias W(Vrev) = 2··(NA+ND)·(V0+Vrev) q·NA·ND Emax(Vrev) = ·(NA+ND) 2·q·NA·ND·(V0+Vrev) W0 = 2··(NA+ND)·V0 q·NA·ND Emax0= ·(NA+ND) 2·q·NA·ND·V0 V0 P N - + W0 -Emax0 W(Vrev) N P - + V0+Vrev -Emax(Vrev) As already known, both the electric field and depletion length increase. When the maximum electric field is high enough, the avalanche breakdown starts.

92
**Avalanche breakdown limit**

Limits for the depletion region with reverse bias Punch-through limit Emax(Vrev) » ·(NA+ND) 2·q·NA·ND·|Vrev| W(Vrev) N P - + » |Vrev| -Emax WPN We must design the semiconductor according to: Emax(Vrev) < EBR. The breakdown voltage is: VBR = EBR2·e·(NA + ND)/(2q·NA·ND). W(Vrev) » 2··(NA+ND)·|Vrev| q·NA·ND Avalanche breakdown limit -EBR Moreover, W(Vrev) < WPN to avoid the phenomenon called punch-through. Usually W(VBR) < WPN, which means that practical voltage limit is not due to punch-through, but to avalanche breakdown.

93
**What must we do to withstand high-voltage?**

2·q·NA·ND VBR = EBR2·e·(NA + ND) NA 2q VBR = ·( ) EBR2·e ND Þ A high value of VBR is obtained if one of the two regions has been slightly doped (i.e., either NA or ND is relatively low). However, it should taken into account that low values of ND (NA) implies: Wide WN (WP), which also implies wide XN (XP) to avoid punch-through. Low nN (pP) and, therefore, low conductivity. If we have long length and low conductivity, then we have high resistivity. Hence, a trade-off between resistivity and breakdown voltage must be established. P+ - N--side + ND NA NA >> ND pP = NA nN = ND WN XN

94
**Maximum electric field Emax with reverse bias Vrev**

P+ - N--side + ND NA (x) x q·ND -q·NA NA >> ND Can we increase VBR for a given EBR value? - Yes, we can. We must modify the electric field profile. - The result is the PIN junctions. -Emax x -EBR VBR Vrev x Vrev_P Vrev_N The main part of the reverse voltage is dropping in the slightly doped region. 94

95
PIN junctions (I) W(Vrev) N P - + Vrev -Emax(Vrev) Main idea: the voltage across the device is proportional to the dashed area (E(x) = - dV/dx). Can we have the same area (same voltage across the device) with a lower value of Emax(Vrev)? Yes, we can. We need another E(x) profile. -Emax(Vrev) new profile (ideal) -Emax(Vrev) To obtain this profile, we need a region without space charge (undoped) inside the PN junction. -Emax(Vrev) new profile (real) -Emax(Vrev) 95

96
**It means P-Intrinsic-N**

PIN junctions (II) It means P-Intrinsic-N Negative space charge Positive space charge A few holes and electrons Many holes Many electrons P-side - N-side + Intrinsic q·ND (x) x -q·NA Characteristics: - Good forward operation due to conductivity modulation. - Low depletion capacitance. - Slow switching operation. All these characteristics will be explained later. -Emax x Vrev x 96

97
**- + P+ N- N+ x x Vrev2 > Vrev1**

Other structure to withstand high voltage: P+N-N+ Heavily doped P Lightly doped N Heavily doped N P+ - + N- N+ NA ND1 ND2 Partially depleted -q·NA q·ND1 (x) x q·(ND2-ND1) q·ND2 Reverse voltage Vrev2 Low reverse voltage Vrev1 x -Emax(Vrev1) -Emax(Vrev2) Vrev2 > Vrev1 97

98
**Forward-bias behaviour of structures to withstand high voltage**

P+ N+ Intrinsic Undoped PIN In both cases, there is a high-resistivity layer (called drift region) P+ N+ N- Lightly doped P+N-N+ This means that, when forward biased, bad behaviour might be expected. However, a new phenomenon arises and the result is quite better than expected. This phenomenon is called conductivity modulation. In this case, high-level injection takes place.

99
**High-level injection:**

Injection levels Low-level injection: nN(0+) >> pNV(0+) High-level injection: nN(0+) » pNV(0+) Log scale Carriers/cm3 104 1012 1014 1016 -0.3 -0.2 -0.1 0- 0+ 0.1 0.2 0.3 Length [mm] 1010 108 106 P+-side N--side Log scale -0.3 -0.2 -0.1 0- 0+ 0.1 0.2 0.3 Length [mm] P+-side N--side pP pNV nPV nN pP pNV nN Not possible! nPV Low-level injection has been assumed so far, for PN and P+N- junctions. In the case of a P+N- junction, this assumption is only valid if the forward bias is not very intense. Else, high-level injection starts. If the forward voltage is high enough, pNV(0+) approaches nN(0+). In this case, nN does not remain constant any more, but it notably increases.

100
**P+ N+ N- P+N-N+ nN- » pN- nP+ pN+ Conductivity modulation NA = 1019**

Drift region P+N-N+ NA = 1019 ND2 = 1019 ND1 = 1014 Holes are injected from the P+-side nN- » pN- Electrons are injected from the N+-side 1016 1014 10 106 10 There is carrier injection from both highly doped regions to the drift region. This is called double injection. This phenomenon substantially increases the carrier concentration in the drift region, thus dramatically reducing the device resistivity.

101
**Semiconductor junctions designed to withstand high voltage**

PIN P+N-N+ Summary A high-resistivity region (drift region) is needed to withstand high voltage when the junction is reverse biased. Fortunately, this high-resistivity “magically” disappears when the junction is forward biased if the device is properly designed to have conductivity modulation. Due to this, devices where the current is passing through P-type and N-type regions (bipolar devices) have superior performances in on-state than devices where the current always passes through the same type (either P or N) of extrinsic semiconductor (unipolar devices). Unfortunately, bipolar devices have inferior switching characteristics than unipolar devices. Due to this, a trade-off between conduction losses and switching losses has to be established frequently selecting power semiconductor devices.

102
**Transient and AC operation of a PN junction**

If we change the bias conditions instantaneusly, can the current change instantaneusly as well? The answer is “no, it cannot”. This is due to the fact that the current conducted by a PN junction depends on the minority carrier concentration just at the edges of the depletion region and the voltage withstood by a PN junction depends on the depletion region width. In both cases, carriers have to be either generated or recombined or moved, which always takes time. These non-idealities can characterize as: Parasitic capacitances (useful for linear applications) Switching times (useful for switching applications)

103
**This is the dominant capacitance in reverse bias**

Parasitic capacitances: depletion layer capacitance (I) (also known as junction capacitance) This is the dominant capacitance in reverse bias Vext P-side VO+Vext - + Zona N VO+Vext+Vext - + N-side Vext + Vext x (x) Carriers are pulled out from the depletion region when Vext is increased in Vext . Additional space charge has been generated.

104
**Parasitic capacitances: depletion layer capacitance (II)**

PN junction Capacitor - + P N Vext Vext Vext + Vext Vext + Vext - + P N Capacitor: new charges are located at the same distance Þ constant capacitance. PN junction: new charges are located farther away from each other Þ non-constant capacitance.

105
**Parasitic capacitances: depletion layer capacitance (III)**

W(Vext) -dQ dQ As it is a non-constant capacitance, static and dynamic capacitances could be defined. The latter is defined as: Cj=dQ/dV=·A/W(Vext) As: W(Vext) = 2··(NA+ND)·(V0-Vext) q·NA·ND Vext Cj Then: Cj = A· 2·(NA+ND)·(V0-Vext) ·q·NA·ND In an “abrupt” PN junction (as we have considered so far), this capacitance is a K·(V0-Vext)-1/2 -type function

106
**This capacitance is the one dominant in forward bias**

Parasitic capacitances: diffusion capacitance (I) This capacitance is the one dominant in forward bias Vext Cj Reverse bias Forward bias Cj increases when the PN junction is forward biased. However, depletion layer capacitance only dominates the reactance of a PN junction under reverse bias. For forward bias, the diffusion capacitance (due to the charge stored in the neutral regions) becomes dominant.

107
**Parasitic capacitances: diffusion capacitance (II)**

1010 1012 1014 1016 Carriers/cm3 -3 -2 -1 1 2 3 Longitud [mm] pP pNV nN nPV V=240mV V=180mV Increase of minority carriers due to a increase of 60mV in forward bias This increase in electric charge is a function of the forward bias voltage. This means that a capacitive effect takes place in these conditions. The dynamic capacitance thus obtained is called diffusion capacitance.

108
**The diode behaviour seems to be ideal in this time scale.**

Switching times in PN junctions (I) Let us consider a PN diode as PN junction. The results obtained can be generalized to PN junctions in other semiconductor devices. a b V1 V2 R i v + - Transition from “a” to “b” (switching off) in a wide time scale (ms or s). i v t V1/R The diode behaviour seems to be ideal in this time scale. -V2

109
**Switching times in PN junctions (II)**

Transition from “a” to “b” (switching off) in a narrow time scale (ms or ns). a b V1 V2 R i v + - i v t V1/R -V2/R ts -V2 trr tf (i= -0.1·V2/R) ts = storage time. Reverse recovery peak tf = fall time. trr = reverse recovery time.

110
**Switching times in PN junctions (III)**

a b V1 V2 R i v + - Why does this evolution occur? This is because the junction cannot withstand voltage until all the excess of minoritary carriers disappears from the neutral regions. v t i pNV nPV Carriers/cm3 8·1013 4·1013 -0.1 0.1 Length [mm] V1/R -V2/R t0 t0 t3 t4 t1 t2 -V2

111
**Switching times in PN junctions (IV)**

a b V1 V2 R i v + - Transition from “b” to “a” (switching on) in a narrow time scale (ms or ns). pNV nPV Carriers/cm3 8·1013 4·1013 -0. 1 0.1 Length [mm] i t4 tr 0,9·V1/R td 0,1·V1/R tfr t1 t3 t0 t2 td = delay time. tr = rise time. tfr = td + tr = forward recovery time.

112
**Trade-off between static and dynamic behaviour in PN junctions**

P+N-N+ and PIN structures allow us to combine high reverse voltage (due to a wide drift region) and low forward resistivity (due to conductivity modulation). However, these structures imply large excess of minority carriers (even majority carries due to conductivity modulation). This excess of carriers must be eliminated when the device switches off to allow the device to withstand voltage. The time to remove this excess of carriers depends on the width of the drift layer. If the drift layer is shorter than a hole diffusion length, then very little charge is stored and the device switches off fast. In this case, however, the device cannot withstand high reverse voltages. 1016 106 10 1014 P+ N+ N- NA = 1019 ND2 = 1019 ND1 = 1014 nP+ pN+ nN- » pN- Excess of electrons in N- Excess of holes in N- Log scale Excess of holes in N+ Excess of electrons in P+ The switching process can be made still faster by purposely adding “recombination centers”, such as Au atoms in Si, to increase the recombination rate. However, this fact can deteriorate the conductivity modulation.

113
**Case #1: an N-type semiconductor transfers electrons to a metal**

Introduction to the metal-semiconductor junctions (I) Metals have many more electrons than semiconductors. However, metals and semiconductors are different materials. This is not the case of a PN junction, where the two sides (P and N) are made up of the same material. In a PN junction made up of a given semiconductor, electrons (holes) move from the N-side (P-side) to the P-side (N-side) due to diffusion, until the built- in voltage establishes an equilibrium between diffusion and drift currents. In a metal-semiconductor junction, the electron movement when the junction is being built strongly depends on the work function of both materials. The higher the work function, the more difficult for the electrons to eject the material. 4 possibilities exist when you build a Metal-Semiconductor (MS) junction: N-type semiconductor Metal N Case #1: an N-type semiconductor transfers electrons to a metal + - N-type Donor ions Electrons (thin sheet)

114
**Lack of electrons (thin sheet )**

Introduction to the metal-semiconductor junctions (II) Case #2: a metal transfers electrons to a P-type semiconductor P-type semiconductor Metal P Acceptor ions Lack of electrons (thin sheet ) - + P-type Recombination between the transferred electrons and the P-side holes takes place in this edge. In Case #1 and Case #2, a depletion region in the semiconductor side has been generated. This depletion region has a built-in voltage that stops the electron diffusion. This built-in voltage can be decreased by external forward bias (thus allowing massive electron diffusion) or increased by external reverse bias (avoiding electron diffusion). The final result is that it works like a rectifying contact (similar to a PN junction).

115
**Case #4: a P-type semiconductor transfers electrons to a metal**

Introduction to the metal-semiconductor junctions (III) Case #3: a metal transfers electrons to an N-type semiconductor N-type semiconductor Metal N-type + - Electrons (thin sheet) Lack of electrons Case #4: a P-type semiconductor transfers electrons to a metal P-type semiconductor Metal P-type + - Electrons (thin sheet) Holes We have an ohmic contact (non-rectifying contact) in both cases.

116
**Case #1: an N-type semiconductor transfers electrons to a metal**

Rectifying contacts (I) W0 Metal N + - N-type Case #1: an N-type semiconductor transfers electrons to a metal ND The width of the depletion region, the maximum electric field and the depletion layer capacitance can be calculated as in the case of a PN junction with an extremely-doped P side (i.e., NA ® ). Therefore: 2··V0 W0 = q·ND Emax0 = 2·q·ND·V0 Cj0 = A· 2·V0 ·q·ND However, the built-in voltage and the I-V characteristic depend on the work function of both the semiconductor and the metal.

117
**Rectifying contacts (II)**

Built-in voltage: V0 = (Fm - Fs_N)/q, where: Fm = metal work function. FS_n = N-type semiconductor work function. Barrier voltage to avoid electron diffusion without bias: VB = (Fm - cS_n)/q, where: cS_n = N-type semiconductor electron affinity. To define these concepts properly, we should introduce others. This task, however, is beyond the scope of this course. I-V characteristic: i = IS·(eVext/VT - 1), as in a PN junction. However, the value of Is has a very different value: IS = A*·A·T2·e-VB/VT , where: A* = Richardson constant (120 amps/(cm2·K2)).

118
**Rectifying contacts (III)**

There is a type of diode based on the operation of a rectifying contact. It is the Schottky diode. Schottky diodes are widely used in many applications, including RF (telecom) circuits and low-voltage, medium-power power converters. Main features: Lower forward voltage drop than a similar-range, PN- junction diode. They are faster than PN diodes because minority carriers hardly play any role in the current conduction process. They are majority carrier devices. However, they always have a higher reverse current (this is not a big problem). When they are made up of silicon, the maximum reverse voltage (compatible with reasonable drop voltage in forward bias) is about 200 V. However, Schottky diodes made up of wide-bandgap materials (such as silicon carbide and gallium nitride) reach breakdown voltages as high as V. Schematic Symbol

119
**Ohmic contacts P+ N+ N P N+ N**

There are two different possibilities to obtain ohmic contacts: a) According to the previous slides, to have an MS junction corresponding to Case #3 or to Case #4. b) To have MS junctions corresponding to Cases #1 or #2, but with an extremely-doped semiconductor side (1019 atoms/cm3). In this situation, electrons can flow in both directions by a tunneling process. Beyond the scope of this course, as well. Ohmic contacts Ohmic contacts P+ N+ N NA1 = 1019 ND2 = 1019 ND1 = 1016 NA2 = 1016 P PN diode Rectifying contacts Ohmic contacts N+ N ND2 = 1019 ND1 = 1016 Schottky diode

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Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 8 Lecture 8: Capacitors and PN Junctions Prof. Niknejad.

Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 8 Lecture 8: Capacitors and PN Junctions Prof. Niknejad.

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