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© 2003-2008 BYU 20 SODA Page 1 ECEn 224 A Soda Machine Controller Or, a Pop Machine Controller, depending on where you grew up…

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Presentation on theme: "© 2003-2008 BYU 20 SODA Page 1 ECEn 224 A Soda Machine Controller Or, a Pop Machine Controller, depending on where you grew up…"— Presentation transcript:

1 © 2003-2008 BYU 20 SODA Page 1 ECEn 224 A Soda Machine Controller Or, a Pop Machine Controller, depending on where you grew up…

2 © 2003-2008 BYU 20 SODA Page 2 ECEn 224 Problem Statement Design a soda machine controller Soda costs 45 cents Give change in smallest # coins possible

3 © 2003-2008 BYU 20 SODA Page 3 ECEn 224 Soda Machine Controller Parts A coinbox mechanism –Accept coins and signal when they are inserted –Eject coins in response to commands A dispense mechanism –Dispense a soda in response to a command A keypad –For accepting input from the user A display –Some lights for communicating to the user

4 © 2003-2008 BYU 20 SODA Page 4 ECEn 224 Step #1: Understand the Complete System Requirements

5 © 2003-2008 BYU 20 SODA Page 5 ECEn 224 The Coinbox Mechanism The VCM7 coinbox –3 low-asserted outputs: qRec, dRec, nRec Signal when quarters, dimes, or nickels received –3 high-asserted inputs: ejQ, ejD, ejN Tell it to eject a quarter, dime, or nickel VCM7 Vending Machine Coin Mechanism qRec dRec nRec ejQ ejD ejN +5V

6 © 2003-2008 BYU 20 SODA Page 6 ECEn 224 Electrical Coinbox Considerations Electrical –VCM7 is 5V part (inputs and outputs) –Our FPGA is 5V tolerant (will accept 5V inputs) –Our FPGA can be configured to output 5V signals on selected pins

7 © 2003-2008 BYU 20 SODA Page 7 ECEn 224 Functional Coinbox Considerations We may need answers to a few questions: Will only one “coin received” signal be asserted at a time? How long will the “coin received” pulses be? Is there a guaranteed gap between “coin received” pulses? Will the VCM7 reject incoming coins when it is ejecting a coin? How fast can the VCM7 eject coins? How long must the “coin eject” pulses be?

8 © 2003-2008 BYU 20 SODA Page 8 ECEn 224 Functional Coinbox Considerations After a call to the company we get the answers… Will only one “coin received” signal be asserted at a time? Yes How long will the “coin received” pulses be? 10-12 ms Is there a guaranteed gap between “coin received” pulses? Yes (2 ms) Will the VCM7 reject incoming coins when it is ejecting a coin? Yes How fast can the VCM7 eject coins? 500 ms between eject signal pulses How long must the “coin eject” pulses be? 45-50 ms From this, we can draw a timing diagram…

9 © 2003-2008 BYU 20 SODA Page 9 ECEn 224 VCM7 Timing Diagram qRec,dRec,nRec ejQ, ejD, ejN 10ms min 12ms max 45ms min 50ms max 2ms min 500ms min Note: coin received signals pulse LOW to indicate receipt of a coin. Note: you should pulse eject coin signal HIGH to eject a coin. VCM7 will refuse coins during this period

10 © 2003-2008 BYU 20 SODA Page 10 ECEn 224 More VCM7 Questions Is there a way to tell if the VCM7 even has a quarter, dime, or nickel available? –Don’t want to accept coins if you cannot make change… Is there a way to tell the VCM7 to refuse to accept coins? After another call to the company, we know the answers: –No and no –But, the VCM8 has these additional features

11 © 2003-2008 BYU 20 SODA Page 11 ECEn 224 The VCM8 Coinbox Mechanism VCM8 Vending Machine Coin Mechanism qRec dRec nRec ejQ ejD ejN +5V qPres dPres nPres acceptCoin VCM8 will refuse coins any time this is asserted Signal presence of at least one quarter, dime, nickel, … These are high-asserted signals All other behavior is same as VCM7

12 © 2003-2008 BYU 20 SODA Page 12 ECEn 224 The Dispense Mechanism itemNum 0111 dispense 5μs min Step #1: Place 4-bit address of item to vend on itemNum wires Step #2: Pulse dispense high Dispense takes place on rising edge

13 © 2003-2008 BYU 20 SODA Page 13 ECEn 224 Dispense Mechanism Considerations All signals are 5V signals Need to obey 5 μs setup time

14 © 2003-2008 BYU 20 SODA Page 14 ECEn 224 The Keypad 123 456 789 Coin Return c0c1 c2 r0 r1 r2 cr Buttons 1-9 encoded by row and column wires going high

15 © 2003-2008 BYU 20 SODA Page 15 ECEn 224 Keypad Considerations All signals are 5V signals Keypad buttons are noisy –Must be debounced –10 ms max settling time

16 © 2003-2008 BYU 20 SODA Page 16 ECEn 224 The Display The display consists simply of 2 LEDs: –A light to say machine is accepting coins –A light to say enough money has been inserted and a soda can be selected

17 © 2003-2008 BYU 20 SODA Page 17 ECEn 224 Step #2: Determine a System Architecture

18 © 2003-2008 BYU 20 SODA Page 18 ECEn 224 qRec dRec nRec qPres dPres nPres ejQ ejD ejN acceptCoin VCM8 Coin Mechanism Timer Subsystem coinReturn Keypad Interface Subsystem Dispense Mechanism vend itemNum btnPushed 4 Keypad cr r0 r1 r2 c0 c1 c2 On-chip/off chip boundary clrTimer 5μs5μs 46ms 501ms enough Central Control Subsystem

19 © 2003-2008 BYU 20 SODA Page 19 ECEn 224 System Organization Considerations Central Control Subsystem is FSM controller A timer is required to time various events Keypad interface system will: –Debounce keypad buttons –Encode row/col wires into 4-bit number –Tell FSM when one of buttons 1-9 is pushed –Tell FSM when coin return button is pushed

20 © 2003-2008 BYU 20 SODA Page 20 ECEn 224 Step #3: Design the Pieces Design the FSM last to reduce number of design iterations

21 © 2003-2008 BYU 20 SODA Page 21 ECEn 224 Design of the Timer Subsystem

22 © 2003-2008 BYU 20 SODA Page 22 ECEn 224 qRec dRec nRec qPres dPres nPres ejQ ejD ejN acceptCoin VCM8 Coin Mechanism Timer Subsystem coinReturn Keypad Interface Subsystem Dispense Mechanism vend itemNum btnPushed 4 Keypad cr r0 r1 r2 c0 c1 c2 On-chip/off chip boundary clrTimer 5μs5μs 46ms 501ms enough Central Control Subsystem

23 © 2003-2008 BYU 20 SODA Page 23 ECEn 224 The Timer Subsystem Entire system is clocked at 1MHz Required delays: –5μ seconds = 5 cycles –46ms = 46,000 cycles –501ms = 501,000 cycles Need a 19-bit counter Basic system is MUX+Register to select between 0 and count+1 –Just like in switch debouncer design example and Chapter 12

24 © 2003-2008 BYU 20 SODA Page 24 ECEn 224 = The =5 Comparator Block – Version #1 count[18:0] ”0000000000000000101” output This is an inefficient design. It can be done with a 3-input AND gate.

25 © 2003-2008 BYU 20 SODA Page 25 ECEn 224 The =5 Comparator Block – Version #2 5 μs count[2] count[1] count[0] After counter is cleared, it will reach this condition in 5 cycles.

26 © 2003-2008 BYU 20 SODA Page 26 ECEn 224 The =46,000 Comparator Block = count18-count0 ”000 1011 0011 1010 1111” output 45,999 Could reduce width of AND gate by choosing some value near 46,000 with lots of low-order 0’s 45,952 (000 1011 0011 1000 0000) – could do with a 9-input AND 46,080 (000 1011 0100 0000 0000) – could do with 6-input AND 47,104 (000 1011 1000 0000 0000) – could do with 5-input AND Do you see why? Requires 16-input AND

27 © 2003-2008 BYU 20 SODA Page 27 ECEn 224 The =501,000 Comparator Block Do something similar to the =46,000 block just seen OR Final carry-out of +1 circuit is =2 19 signal (=524,288) –We can eliminate the 19-bit AND Could play similar trick with =46,000 if happy with powers-of-2 Bit 16 corresponds to 2 16 = 65,536 65.536 ms is longer than the 50 ms maximum allowed

28 © 2003-2008 BYU 20 SODA Page 28 ECEn 224 Detecting 2 19 Half Adder A0A0 S0S0 C1C1 ‘1’ Half Adder A1A1 S1S1 C2C2 A 18 S 18 C 19 Use this signal for 2 19 C0C0 …

29 © 2003-2008 BYU 20 SODA Page 29 ECEn 224 Design of the Keypad Interface Subsystem

30 © 2003-2008 BYU 20 SODA Page 30 ECEn 224 qRec dRec nRec qPres dPres nPres ejQ ejD ejN acceptCoin VCM8 Coin Mechanism Timer Subsystem coinReturn Keypad Interface Subsystem Dispense Mechanism vend itemNum btnPushed 4 Keypad cr r0 r1 r2 c0 c1 c2 On-chip/off chip boundary clrTimer 5μs5μs 46ms 501ms enough Central Control Subsystem

31 © 2003-2008 BYU 20 SODA Page 31 ECEn 224 Keypad Interface Functions Debounce the 7 inputs from keypad Determine when button has been pressed and assert btnPressed signal Encode button number on itemNum signal bits

32 © 2003-2008 BYU 20 SODA Page 32 ECEn 224 Keypad Interface Block Diagram debounce 10ms cr r0 r1 r2 c0 c1 c2 Detect and Encode btnPressed 4 itemNum coinReturn debounce 10ms

33 © 2003-2008 BYU 20 SODA Page 33 ECEn 224 The Keypad Detect and Encode Block Easiest way to implement is as lookup table –Use a ROM –Encode not only itemNum but also btnPressed –Easy to reject illegal combinations 2 buttons pressed, column asserted but not row, etc. Output should be loaded into register, so choice is remembered …

34 © 2003-2008 BYU 20 SODA Page 34 ECEn 224 2 r2 c0 c1 c2 r2 c0 c1 c2 r2 c0 c1 c2 r2 c0 c1 c2 r0r1 i3 00xxxx x x x x x … 00xxxx x x x x x 01xxxx x x x x x … 01xxxx x x x x x 10xxxx x x x x x … 10xxxx x x x x x 11xxxx x x x x x … 11xxxx x x x x x Truth Table 00 01 10 11 Comb Logic Detect and Encode Using 4LUTs Only Very similar to decomposition when we used MUX blocks to implement truth tables… 4LUT

35 © 2003-2008 BYU 20 SODA Page 35 ECEn 224 Design of the Central Control Subsystem

36 © 2003-2008 BYU 20 SODA Page 36 ECEn 224 qRec dRec nRec qPres dPres nPres ejQ ejD ejN acceptCoin VCM8 Coin Mechanism Timer Subsystem coinReturn Keypad Interface Subsystem Dispense Mechanism vend itemNum btnPushed 4 Keypad cr r0 r1 r2 c0 c1 c2 On-chip/off chip boundary clrTimer 5μs5μs 46ms 501ms enough Central Control Subsystem

37 © 2003-2008 BYU 20 SODA Page 37 ECEn 224 FSM + Accumulator coinReturn btnPushed FSM Accumulator vend 3333 qRec, dRec, nRec acceptCoin qPres, dPres, nPres clrTimer 5μs5μs 46ms 501ms globalReset add10 add25sub5 sub10sub25 gt0gte10gte25 add5 clrAccum enough sub45 enough

38 © 2003-2008 BYU 20 SODA Page 38 ECEn 224 Accumulator Functions Totals money as inserted Inform FSM of balance –Enough to buy a soda –At least 25 cents –At least 10 cents –At least 5 cents All money in terms of 5 cent increments –Count in 5 cent increments instead of cents

39 © 2003-2008 BYU 20 SODA Page 39 ECEn 224 Accumulator Block Diagram 4 4 OFL gt0 gte10 gte25 enough accum Clearable Accumulator addSub# clk clr IFL add5,add10,add25 sub5,sub10,sub25 sub45 clrAccum accumValue load FSM tells it to add money, subtract money, or clear It tells FSM how much money it has totalled We are going to build it in the MUX+Register style of Chapter 12

40 © 2003-2008 BYU 20 SODA Page 40 ECEn 224 The Clearable Accumulator Sub-Block D Q 0101 0 clr 4 4 4 clk add/ sub 0101 4 load 4 accum accumValue addSub# 4

41 © 2003-2008 BYU 20 SODA Page 41 ECEn 224 The Clearable Accumulator Sub-Block D Q 0101 0 clr 4 4 4 clk add/ sub 0101 44 load 4 accum accumValue addSub# Loadable register

42 © 2003-2008 BYU 20 SODA Page 42 ECEn 224 The Clearable Accumulator Sub-Block D Q 0101 0 clr 4 4 4 clk add/ sub 0101 44 load 4 accum accumValue addSub# Clear capability

43 © 2003-2008 BYU 20 SODA Page 43 ECEn 224 The Clearable Accumulator Sub-Block D Q 0101 0 clr 4 4 4 clk add/ sub 0101 44 load 4 accum accumValue addSub# Add/sub capability

44 © 2003-2008 BYU 20 SODA Page 44 ECEn 224 The Clearable Accumulator Sub-Block D Q 0101 0 clr 4 4 4 clk add/ sub 0101 44 load 4 accum accumValue addSub# What has priority? addSub#, clr, or load ?

45 © 2003-2008 BYU 20 SODA Page 45 ECEn 224 Building an Adder Full Adder Full Adder Full Adder Full Adder C 0 = 0 A0A0 B0B0 B1B1 A1A1 B2B2 A2A2 B3B3 A3A3 B0’B0’B1’B1’B2’B2’B3’B3’ S3S3 C4C4 S2S2 C3C3 S1S1 C2C2 S0S0 C1C1 …

46 © 2003-2008 BYU 20 SODA Page 46 ECEn 224 Building a Subtractor Full Adder Full Adder Full Adder Full Adder C 0 = 1 A0A0 B0B0 B1B1 A1A1 B2B2 A2A2 B3B3 A3A3 B0’B0’B1’B1’B2’B2’B3’B3’ S3S3 C4C4 S2S2 C3C3 S1S1 C2C2 S0S0 In chapter 8 we learned about how to use an adder as a subtractor: invert B and add 1 ( A-B = A + (-B) ) Add 1 C1C1 Invert B …

47 © 2003-2008 BYU 20 SODA Page 47 ECEn 224 Building an Adder/Subtractor Full Adder Full Adder Full Adder Full Adder sub A0A0 B0B0 B1B1 A1A1 B2B2 A2A2 B3B3 A3A3 B0’B0’B1’B1’B2’B2’B3’B3’ S3S3 C4C4 S2S2 C3C3 S1S1 C2C2 S0S0 Here is a design that either adds or subtracts (Either inverts B and adds 1 or doesn’t) C1C1 0101 0101 0101 0101 sub …

48 © 2003-2008 BYU 20 SODA Page 48 ECEn 224 Simplified Adder/Subtractor 0101 sub b q b q If you don’t believe it, do a truth table…

49 © 2003-2008 BYU 20 SODA Page 49 ECEn 224 Final Adder/Subtractor Full Adder A0A0 B0B0 S0S0 C0C0 addSub# Full Adder A1A1 B1B1 S1S1 C1C1 A2A2 B2B2 S2S2 C2C2 …

50 © 2003-2008 BYU 20 SODA Page 50 ECEn 224 Accumulator IFL Block Use these signals: add5, add10, add25, sub5, sub10, sub25, sub45, clrAccum Generate these signals: accumValue[3:0], clr, addSub#, load There are many ways to do this –Not unlike there being many ways to write any particular computer program –We will show an intuitive approach rather than a truth-table approach

51 © 2003-2008 BYU 20 SODA Page 51 ECEn 224 Accumulator IFL add5 add10 add25 addSub# add5 sub5 5 add10 sub10 10 add25 sub25 25 clrAccumclr load 5 10 25 clrAccum sub45 2 0001 0010 0101 1001 accumSel 4 Any time you are adding… Determine how much to add or subtract Load any time you are adding, subtracting, or clearing Generate value to either add or subtract accumValue

52 © 2003-2008 BYU 20 SODA Page 52 ECEn 224 Accumulator OFL From balance in accumulator, determine how much money has been accumulated: –Greater than 0 ( gt0 ) –Greater than equal to 10 ( gte10 ) –Greater than equal to 25 ( gte25 ) –Greater than equal to 45 ( enough )

53 © 2003-2008 BYU 20 SODA Page 53 ECEn 224 Design of Comparators Simply subtract: a>=b iff a-b > -1 a>=b iff (b-1)-a =2 iff 1-a =5 iff 4-a =9 iff 8-a < 0 Generate the comparisons using subtractors –Sign bit of subtract is comparator output

54 © 2003-2008 BYU 20 SODA Page 54 ECEn 224 Comparators accum3 accum2 accum1 accum0 gt0 1-a accum gte10 4-a accum gte25 8-a accum enough If any accumulator bits non-zero, accumulator is greater than zero a>=2 iff 1-a =5 iff 4-a =9 iff 8-a<0 (enough)

55 © 2003-2008 BYU 20 SODA Page 55 ECEn 224 The Central Control FSM Major functions: 1.Accept coins and total money 2.Dispense soda in response to keypad 3.Make change (use fewest coins possible) 4.Drive display lights

56 © 2003-2008 BYU 20 SODA Page 56 ECEn 224 Central Control FSM Overview Accept Coins Dispense Soda and/or Make Change enoughcoinReturn

57 © 2003-2008 BYU 20 SODA Page 57 ECEn 224 Accepting Coins qRec’+dRec’+nRec’ S6 S5 S4S3S2 S1 enough qRecdRecnReccoinReturn’ qRec’ coinReturn’ add25add10add5 qRecdRecnRec enough’ nRec’ coinReturn’ dRec’ coinReturn’ coinReturn acceptCoin to S9 to S7 from S0 Accept coins until enough inserted or coinReturn is pushed… Carefully examine transitions… Is this FSM complete and conflict-free?

58 © 2003-2008 BYU 20 SODA Page 58 ECEn 224 Dispensing Soda and Making Change S13 S10 ejQ S14 S11 ejD S15 S12 ejN 46ms’ S16 S17 501ms’ 46ms S9 S7 coinReturn’ bntPushed’ coinReturn S8 coinReturn’btnPushed sub45, vend sub25 clrTimer sub10 clrTimer sub5 clrTimer clrTimer 501ms 46ms gt0’ gte25qPres gt0(qPres’dPres’ + gte25’dPres’ + gte10’) dPres (gte25’gte10 + gte25qPres’) from S6 to S0 Dispense soda Make change Do you see how this makes change using fewest coins possible?

59 © 2003-2008 BYU 20 SODA Page 59 ECEn 224 Ensuring Enough Change Available 5 + 5 + 5 + 5 + 5 + 5 + 5 + 5 + 10 = 50 5 OK 5 + 5 + 5 + 5 + 5 + 5 + 5 + 5 + 25 = 65 20 OK 10 + 10 + 10 + 10 + 10 = 50 5 10 + 10 + 10 + 10 + 25 = 65 20 OK 25 + 25 = 50 5 25 + 10 + 5 + 25 = 65 20 25 + 10 + 5 + 10 = 50 5 OK Inserted Change If only we had started with a nickel!

60 © 2003-2008 BYU 20 SODA Page 60 ECEn 224 Ensuring Enough Change Available global Reset clrAccum(coinReturn’btnPushed’nPres)’ S0 coinReturn’btnPushed’nPres

61 © 2003-2008 BYU 20 SODA Page 61 ECEn 224 The Entire FSM Don’t accept coins if there is not enough in the coinbox to make change! You can prove that with just a nickel in the coinbox you can always make change for a $0.45 purchase… Note in which states the acceptCoin output is asserted. Note in which states the enough signal is read. gt0(qPres’dPres’ + gte25’dPres’ + gte10’) S12 S13 S14 S15 S16 S17

62 © 2003-2008 BYU 20 SODA Page 62 ECEn 224 Completeness and Conflicts State S9 logic is hard to get correct due to number of signals involved S9 gt0’ gte25qPres gt0(qPres’dPres’ + gte25’dPres’ + gte10’) dPres(gte25’gte10 + gte25qPres’)

63 © 2003-2008 BYU 20 SODA Page 63 ECEn 224 Completeness and Conflicts S9 gt0’ gte25qPres gt0(qPres’dPres’ + gte25’dPres’ + gte10’) dPres(gte25’gte10 + gte25qPres’) Is it conflict free? How about gt0’gte25qPres ? This condition can never occur!

64 © 2003-2008 BYU 20 SODA Page 64 ECEn 224 Completeness and Conflicts State S9 may not look conflict free… However, we know that certain conditions will never occur –Like gte10gt0’ or gte25gte10’ Other states may show similar simplifications

65 © 2003-2008 BYU 20 SODA Page 65 ECEn 224 Asynchronous Input Handling Inputs from the outside world are all asynchronous to our design Pass all through synchronizing flip flops first All except keypad buttons (already synchronized by debounce circuitry)

66 © 2003-2008 BYU 20 SODA Page 66 ECEn 224 Hazard-Free Output Generation Signals sent to outside mechanisms must be hazard- free –ejQ, ejD, ejN, acceptCoin, vend For outputs, use hazard-free logic minimization –Only works for single-signal changes –Certain states may need to be adjacent in gray code so only one input to OFL changes at once Simpler solution: Pass sensitive output signals through a flip flop on way to outside mechanisms –Alright if system timing will allow added delay –This will guarantee they are hazard-free

67 © 2003-2008 BYU 20 SODA Page 67 ECEn 224 Some Thoughts on Verification and Debug Verification  Simulation to verify that the system works as desired Debug  Find source of and fix problems in the design

68 © 2003-2008 BYU 20 SODA Page 68 ECEn 224 Verification Simulating operation in light of long timer delays could take a long time Solution: Parameterize timer so it is easy to build one with very short delays –Simulation can verify that machine works with very short delays Another solution: Build 2 timers (one with short delays and one with long delays) CAUTION: Always do a final simulation with final modules to ensure all works correctly

69 © 2003-2008 BYU 20 SODA Page 69 ECEn 224 Debug If it doesn’t work… –Difficult to determine why without access to internal signals –Bring internal signals out to some kind of debug port Drive pins on which to hook a logic analyzer or oscilloscope Bring out current state + other important signals Prototyping using an FPGA is a common approach

70 © 2003-2008 BYU 20 SODA Page 70 ECEn 224 Mistakes are easy to make! Forgot to ensure required 5 µs setup between itemNum and vend signal! gt0(qPres’dPres’ + gte25’dPres’ + gte10’) S12 S13 S14 S15 S16 S17


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